aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/xilinx
diff options
context:
space:
mode:
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r--techlibs/xilinx/dsp_map.v2
-rw-r--r--techlibs/xilinx/synth_xilinx.cc8
2 files changed, 4 insertions, 6 deletions
diff --git a/techlibs/xilinx/dsp_map.v b/techlibs/xilinx/dsp_map.v
index 28e456898..32f570935 100644
--- a/techlibs/xilinx/dsp_map.v
+++ b/techlibs/xilinx/dsp_map.v
@@ -1,4 +1,4 @@
-module \$__MUL25X18 (input [24:0] A, input [17:0] B, output [42:0] Y);
+module \$__MUL25X18 (input signed [24:0] A, input signed [17:0] B, output signed [42:0] Y);
wire [47:0] P_48;
DSP48E1 #(
// Disable all registers
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index bfce922db..2e2fbbd9d 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -284,12 +284,10 @@ struct SynthXilinxPass : public ScriptPass
run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6");
- // The actual behaviour of the Xilinx DSP is a signed 25x18 multiply
- // Due to current limitations of mul2dsp, we are actually mapping as a 24x17
- // unsigned multiply with MSBs set to 1'b0
-
- if (!nodsp || help_mode)
+ if (!nodsp || help_mode) {
+ // NB: Xilinx multipliers are signed only
run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=25 -D DSP_A_SIGNEDONLY=1 -D DSP_B_MAXWIDTH=18 -D DSP_B_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18");
+ }
run("alumacc");
run("share");