aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/xilinx
diff options
context:
space:
mode:
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r--techlibs/xilinx/cells_sim.v24
-rw-r--r--techlibs/xilinx/synth_xilinx.cc8
2 files changed, 24 insertions, 8 deletions
diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v
index bec9ea1a0..3ad96d7fb 100644
--- a/techlibs/xilinx/cells_sim.v
+++ b/techlibs/xilinx/cells_sim.v
@@ -183,9 +183,11 @@ endmodule
(* abc_box_id = 4, lib_whitebox *)
module CARRY4(
- (* abc_carry *) output [3:0] CO,
+ (* abc_carry *)
+ output [3:0] CO,
output [3:0] O,
- (* abc_carry *) input CI,
+ (* abc_carry *)
+ input CI,
input CYINIT,
input [3:0] DI, S
);
@@ -298,9 +300,11 @@ endmodule
(* abc_box_id = 5 *)
module RAM32X1D (
output DPO, SPO,
- (* abc_scc_break *) input D,
+ (* abc_scc_break *)
+ input D,
input WCLK,
- (* abc_scc_break *) input WE,
+ (* abc_scc_break *)
+ input WE,
input A0, A1, A2, A3, A4,
input DPRA0, DPRA1, DPRA2, DPRA3, DPRA4
);
@@ -318,9 +322,11 @@ endmodule
(* abc_box_id = 6 *)
module RAM64X1D (
output DPO, SPO,
- (* abc_scc_break *) input D,
+ (* abc_scc_break *)
+ input D,
input WCLK,
- (* abc_scc_break *) input WE,
+ (* abc_scc_break *)
+ input WE,
input A0, A1, A2, A3, A4, A5,
input DPRA0, DPRA1, DPRA2, DPRA3, DPRA4, DPRA5
);
@@ -338,9 +344,11 @@ endmodule
(* abc_box_id = 7 *)
module RAM128X1D (
output DPO, SPO,
- (* abc_scc_break *) input D,
+ (* abc_scc_break *)
+ input D,
input WCLK,
- (* abc_scc_break *) input WE,
+ (* abc_scc_break *)
+ input WE,
input [6:0] A, DPRA
);
parameter INIT = 128'h0;
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 7ba67409b..87f4af8f7 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -105,6 +105,7 @@ struct SynthXilinxPass : public ScriptPass
std::string top_opt, edif_file, blif_file, family;
bool flatten, retime, vpr, nobram, nolutram, nosrl, nocarry, nowidelut, abc9;
+ bool flatten_before_abc;
int widemux;
void clear_flags() YS_OVERRIDE
@@ -123,6 +124,7 @@ struct SynthXilinxPass : public ScriptPass
nocarry = false;
nowidelut = false;
abc9 = false;
+ flatten_before_abc = false;
widemux = 0;
}
@@ -162,6 +164,10 @@ struct SynthXilinxPass : public ScriptPass
flatten = true;
continue;
}
+ if (args[argidx] == "-flatten_before_abc") {
+ flatten_before_abc = true;
+ continue;
+ }
if (args[argidx] == "-retime") {
retime = true;
continue;
@@ -385,6 +391,8 @@ struct SynthXilinxPass : public ScriptPass
if (check_label("map_luts")) {
run("opt_expr -mux_undef");
+ if (flatten_before_abc)
+ run("flatten");
if (help_mode)
run("abc -luts 2:2,3,6:5[,10,20] [-dff]", "(option for 'nowidelut', option for '-retime')");
else if (abc9) {