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Diffstat (limited to 'tests/arch/ice40/logic.ys')
| -rw-r--r-- | tests/arch/ice40/logic.ys | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/arch/ice40/logic.ys b/tests/arch/ice40/logic.ys index fc5e5b1d8..7432f5b1f 100644 --- a/tests/arch/ice40/logic.ys +++ b/tests/arch/ice40/logic.ys @@ -1,4 +1,4 @@ -read_verilog logic.v +read_verilog ../common/logic.v hierarchy -top top equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) |