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-rw-r--r--tests/simple/asgn_binop.sv23
1 files changed, 23 insertions, 0 deletions
diff --git a/tests/simple/asgn_binop.sv b/tests/simple/asgn_binop.sv
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+++ b/tests/simple/asgn_binop.sv
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+`define TEST(name, asgnop)\
+ module test_``name ( \
+ input logic [3:0] a, b, \
+ output logic [3:0] c \
+ ); \
+ always @* begin \
+ c = a; \
+ c asgnop b; \
+ end \
+ endmodule
+
+`TEST(add, +=)
+`TEST(sub, -=)
+`TEST(mul, *=)
+`TEST(div, /=)
+`TEST(mod, %=)
+`TEST(bit_and, &=)
+`TEST(bit_or , |=)
+`TEST(bit_xor, ^=)
+`TEST(shl, <<=)
+`TEST(shr, >>=)
+`TEST(sshl, <<<=)
+`TEST(sshr, >>>=)