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-rw-r--r--tests/sva/basic02.sv2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/sva/basic02.sv b/tests/sva/basic02.sv
index 6100c50ae..cf2d72ae7 100644
--- a/tests/sva/basic02.sv
+++ b/tests/sva/basic02.sv
@@ -13,4 +13,4 @@ module top_properties (input logic clock, read, write, ready);
a_wr: assert property ( @(posedge clock) write |-> ready );
endmodule
-bind top top_properties inst (.*);
+bind top top_properties properties_inst (.*);