| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Move LSB tests from wreduce to opt_expr | Eddie Hung | 2019-08-06 | 2 | -99/+101 |
| * | Merge remote-tracking branch 'origin/master' into eddie/wreduce_add | Eddie Hung | 2019-08-06 | 56 | -172/+763 |
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| | * | Merge pull request #1232 from YosysHQ/dave/write_gzip | David Shah | 2019-08-06 | 4 | -7/+79 |
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| | | * | Add test for writing gzip-compressed files | David Shah | 2019-08-06 | 2 | -0/+18 |
| | | * | Add support for writing gzip-compressed files | David Shah | 2019-08-06 | 2 | -7/+61 |
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| | * | Merge pull request #1251 from YosysHQ/clifford/nmux | Clifford Wolf | 2019-08-06 | 19 | -42/+174 |
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| | | * | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 19 | -42/+174 |
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| | * | Merge pull request #1242 from jfng/fix-proc_prune-partial | whitequark | 2019-08-03 | 1 | -2/+11 |
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| | | * | proc_prune: Promote partially redundant assignments. | Jean-François Nguyen | 2019-08-01 | 1 | -2/+11 |
| | * | | Merge pull request #1238 from mmicko/vsbuild_fix | Clifford Wolf | 2019-08-02 | 2 | -1/+2 |
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| | | * | | Visual Studio build fix | Miodrag Milanovic | 2019-07-31 | 2 | -1/+2 |
| | * | | | Merge pull request #1239 from mmicko/mingw_fix | Clifford Wolf | 2019-08-02 | 11 | -25/+37 |
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| | | * | | | Fix linking issue for new mxe and pthread | Miodrag Milanovic | 2019-08-01 | 1 | -1/+2 |
| | | * | | | Fix yosys linking for mxe | Miodrag Milanovic | 2019-08-01 | 1 | -1/+1 |
| | | * | | | New mxe hacks needed to support 2ca237e | Miodrag Milanovic | 2019-08-01 | 1 | -0/+4 |
| | | * | | | Fix formatting for msys2 mingw build using GetSize | Miodrag Milanovic | 2019-08-01 | 10 | -23/+30 |
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| | * | | | Merge pull request #1236 from YosysHQ/eddie/xc6s_brams_map | Eddie Hung | 2019-08-01 | 1 | -3/+3 |
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| | | * | | RST -> RSTBRST for RAMB8BWER | Eddie Hung | 2019-07-29 | 1 | -3/+3 |
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| | * | | Merge pull request #1233 from YosysHQ/clifford/defer | Clifford Wolf | 2019-07-31 | 2 | -49/+21 |
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| | | * | Update README to use "read" instead of "read_verilog" | Clifford Wolf | 2019-07-29 | 1 | -48/+19 |
| | | * | Call "read_verilog" with -defer from "read" | Clifford Wolf | 2019-07-29 | 1 | -1/+2 |
| | * | | Merge pull request #1228 from YosysHQ/dave/yy_buf_size | Eddie Hung | 2019-07-29 | 1 | -0/+3 |
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| | | * | | verilog_lexer: Increase YY_BUF_SIZE to 65536 | David Shah | 2019-07-26 | 1 | -0/+3 |
| | * | | | Merge pull request #1234 from mmicko/fix_gzip_no_exist | David Shah | 2019-07-29 | 1 | -19/+21 |
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| | | * | | Fix case when file does not exist | Miodrag Milanovic | 2019-07-29 | 1 | -19/+21 |
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| | * | | Merge pull request #1226 from YosysHQ/dave/gzip | David Shah | 2019-07-27 | 8 | -13/+70 |
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| | | * | Update CHANGELOG | David Shah | 2019-07-26 | 1 | -1/+1 |
| | | * | Fix frontend auto-detection for gzipped input | David Shah | 2019-07-26 | 1 | -9/+12 |
| | | * | Add support for reading gzip'd input files | David Shah | 2019-07-26 | 6 | -3/+57 |
| | * | | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-07-25 | 17 | -29/+360 |
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| | | * \ | Merge branch 'ZirconiumX-synth_intel_m9k' | Clifford Wolf | 2019-07-25 | 4 | -5/+11 |
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| | | | * | | intel: Map M9K BRAM only on families that have it | Dan Ravensloft | 2019-07-23 | 4 | -5/+12 |
| | | * | | | Merge pull request #1218 from ZirconiumX/synth_intel_iopads | Clifford Wolf | 2019-07-25 | 1 | -8/+8 |
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| | | | * | | | intel: Make -noiopads the default | Dan Ravensloft | 2019-07-24 | 1 | -8/+8 |
| | | * | | | | Merge pull request #1219 from jakobwenzel/objIterator | Clifford Wolf | 2019-07-25 | 2 | -3/+20 |
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| | | | * | | | | replaced std::iterator with using statements | Jakob Wenzel | 2019-07-25 | 1 | -6/+6 |
| | | | * | | | | made ObjectIterator extend std::iterator | Jakob Wenzel | 2019-07-24 | 2 | -2/+19 |
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| | | * | | | | Merge pull request #1224 from YosysHQ/xilinx_fix_ff | Eddie Hung | 2019-07-25 | 1 | -2/+2 |
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| | | | * | | | xilinx: Fix missing cell name underscore in cells_map.v | David Shah | 2019-07-25 | 1 | -2/+2 |
| | | * | | | | Merge pull request #1222 from koriakin/s6-example | Eddie Hung | 2019-07-24 | 5 | -0/+47 |
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| | | | * | | | Add a simple example for Spartan 6 | Marcin Kościelnicki | 2019-07-24 | 5 | -0/+47 |
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| | | * | | | Merge pull request #1212 from YosysHQ/eddie/signed_ice40_dsp | Eddie Hung | 2019-07-23 | 3 | -9/+241 |
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| | | | * | | | ice40: Fix test_dsp_model.sh | David Shah | 2019-07-19 | 1 | -1/+1 |
| | | | * | | | ice40/cells_sim.v: Fix sign of J and K partial products | David Shah | 2019-07-19 | 1 | -5/+7 |
| | | | * | | | ice40/cells_sim.v: LSB of A/B only signed in 8x8 mode | David Shah | 2019-07-19 | 1 | -2/+2 |
| | | | * | | | Add tests for all combinations of A and B signedness for comb mul | Eddie Hung | 2019-07-19 | 2 | -1/+229 |
| | | | * | | | Don't copy ref if exists already | Eddie Hung | 2019-07-19 | 1 | -1/+3 |
| | | * | | | | Merge pull request #1214 from jakobwenzel/astmod_clone | Eddie Hung | 2019-07-22 | 1 | -0/+2 |
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| | | | * | | | initialize noblackbox and nowb in AstModule::clone | Jakob Wenzel | 2019-07-22 | 1 | -0/+2 |
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| | | * / / | Add "stat -tech cmos" | Clifford Wolf | 2019-07-20 | 1 | -2/+29 |
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index : iCE40/yosys | |
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