aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Replaced std::unordered_map as implementation for Yosys::dictClifford Wolf2014-12-2612-103/+318
* Added new_dict (hashmap.h) and re-enabled code coverage countersClifford Wolf2014-12-266-7/+246
* Temporary gcc 4.6 build hotfix for Yosys::dict and Yosys::nodictClifford Wolf2014-12-261-8/+3
* Added "yosys -d" command line optionClifford Wolf2014-12-261-10/+28
* Added Yosys::{dict,nodict,vector} container typesClifford Wolf2014-12-2621-331/+495
* Various fixes and improvements in "write_smt2 -bv"Clifford Wolf2014-12-253-11/+43
* Added "test_cell -muxdiv"Clifford Wolf2014-12-251-2/+18
* Various fixes and improvements in write_smt2Clifford Wolf2014-12-252-32/+88
* Added "test_cell -w" featureClifford Wolf2014-12-251-18/+39
* Fixed simplemap for $ne cells with output width > 1Clifford Wolf2014-12-251-7/+8
* Added support for most BV cell types to write_smt2Clifford Wolf2014-12-251-14/+221
* Added "write_smt2 -bv" and other write_smt2 improvementsClifford Wolf2014-12-251-172/+153
* Fixed off-by-one bug in "hierarchy -check" for positional module argsClifford Wolf2014-12-241-2/+2
* Added write_smt2 (only gate level logic supported so far)Clifford Wolf2014-12-242-0/+353
* Added "dfflibmap -prepare" helpClifford Wolf2014-12-241-1/+5
* Added "dfflibmap -prepare"Clifford Wolf2014-12-241-31/+54
* Added "dff2dffe -direct" for direct gate mappingClifford Wolf2014-12-241-5/+37
* Added "dff2dffe -unmap"Clifford Wolf2014-12-241-6/+42
* Added support for gate-level cells in dff2dffeClifford Wolf2014-12-241-9/+38
* Improvements in simplemap api, added $ne $nex $eq $eqx supportClifford Wolf2014-12-244-75/+112
* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-2412-34/+33
* Improved ABC clock domain partitioningClifford Wolf2014-12-231-2/+59
* Indenting fix in show.ccClifford Wolf2014-12-231-2/+2
* Added "show -colorattr"Clifford Wolf2014-12-231-4/+35
* Added "abc -markgroups"Clifford Wolf2014-12-231-0/+20
* Added support for multiple clock domains to "abc" passClifford Wolf2014-12-212-64/+124
* Fixed "abc" pass for clk and enable signals driven by logicClifford Wolf2014-12-211-6/+8
* Added DFFE support to "abc" passClifford Wolf2014-12-201-11/+78
* Added $dffe support to write_verilogClifford Wolf2014-12-201-3/+14
* Checking existence of ports in "hierarchy -check"Clifford Wolf2014-12-191-0/+13
* Fixed another bug in write_blif handling of $lut cellsClifford Wolf2014-12-191-1/+1
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2014-12-171-1/+1
|\
| * Fixed build with gcc 4.6Clifford Wolf2014-12-161-1/+1
* | Fixed writing of $lut cells in BLIF backendClifford Wolf2014-12-171-7/+7
|/
* Added "write_blif -undef" and support for special "-" true/false/undef typeClifford Wolf2014-12-141-13/+33
* Added "write_blif -blackbox"Clifford Wolf2014-12-141-2/+16
* Added "blif -unbuf" featureClifford Wolf2014-12-141-0/+19
* Removed psmisc from deps list (usually fuser is already installed and the pac...Clifford Wolf2014-12-141-3/+2
* Added psmisc to prerequisitesClifford Wolf2014-12-121-1/+1
* Removed UTF-8 chars from techmap.vClifford Wolf2014-12-121-1/+1
* Added missing prerequisites to READMEClifford Wolf2014-12-121-1/+2
* Added IdString::destruct_guard hackClifford Wolf2014-12-112-0/+14
* Compile fix for visual studioClifford Wolf2014-12-111-0/+1
* Fixed supply0/supply1 with many wiresClifford Wolf2014-12-111-3/+15
* Added functionality to dff2dffe passClifford Wolf2014-12-082-2/+168
* Added bool constructors to SigBit and SigSpecClifford Wolf2014-12-082-0/+12
* Added module->addDffe() and module->addDffeGate()Clifford Wolf2014-12-082-1/+26
* Added skeleton dff2dffe passClifford Wolf2014-12-083-2/+78
* Added more documentation fixmes for nontrivial register cellsClifford Wolf2014-12-081-1/+9
* Added $dffe cell typeClifford Wolf2014-12-084-1/+54
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-26 16:02:34 +0000