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* Merge branch 'master' of https://github.com/ALGCDG/yosysArchie2022-08-2181-737/+4859
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| * Bump versiongithub-actions[bot]2022-08-191-1/+1
| * Merge pull request #3450 from jix/write_aiger_nonffJannis Harder2022-08-182-1/+8
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| | * write_aiger: Fix non-$_FF_ FFsJannis Harder2022-08-182-1/+8
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| * Bump versiongithub-actions[bot]2022-08-171-1/+1
| * Merge pull request #3434 from jix/witness_flowJannis Harder2022-08-1633-167/+2255
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| | * sim: -hdlname option to preserve flattened hierarchy in sim outputJannis Harder2022-08-162-9/+43
| | * smtbmc: Set step range for --yw and dont skip steps for --check-witnessJannis Harder2022-08-161-2/+14
| | * Update CEX minimization patches for abcJannis Harder2022-08-161-1/+1
| | * clk2fflogic: Generate less unused logic when using verificJannis Harder2022-08-161-1/+4
| | * rename: Add -witness modeJannis Harder2022-08-162-0/+83
| | * yosys-witness: Add stats commandJannis Harder2022-08-161-0/+18
| | * smtbmc: Add --check-witness modeJannis Harder2022-08-161-1/+22
| | * aiger: Add yosys-witness supportJannis Harder2022-08-163-2/+320
| | * smtbmc: Add native json based witness format + smt2 backend supportJannis Harder2022-08-169-113/+983
| | * btor: Support $anyinit cellsJannis Harder2022-08-161-1/+1
| | * aiger: Support $anyinit cellsJannis Harder2022-08-161-0/+11
| | * smt2: Support $anyinit cellsJannis Harder2022-08-161-10/+11
| | * memory_map: Add -formal optionJannis Harder2022-08-162-17/+68
| | * setundef: Do not add anyseq / anyconst to unused memory port clocksJannis Harder2022-08-161-0/+24
| | * wreduce: Keep more x-bits with -keepdcJannis Harder2022-08-161-4/+4
| | * formalff: New -setundef optionJannis Harder2022-08-161-0/+335
| | * formalff: Set new replaced_by_gclk attribute on removed dff's clksJannis Harder2022-08-164-0/+44
| | * Add the $anyinit cell and the formalff passJannis Harder2022-08-1616-8/+271
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| * Bump versiongithub-actions[bot]2022-08-121-1/+1
| * Merge pull request #3425 from YosysHQ/lofty/stat-jsonN. Engelhardt2022-08-111-38/+109
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| | * stat: add option for machine-readable json outputLofty2022-08-111-38/+109
| * | Merge pull request #3277 from YosysHQ/lofty/rename-scramble_nameN. Engelhardt2022-08-112-0/+87
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| | * rename: add -scramble-name option to randomly rename selectionsLofty2022-08-082-0/+87
| * | Bump versiongithub-actions[bot]2022-08-111-1/+1
| * | Merge pull request #3443 from YosysHQ/micko/resetall_undefineallMiodrag Milanović2022-08-101-0/+5
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| | * | set default_nettype to wire for resetallMiodrag Milanovic2022-08-101-0/+1
| | * | resetall does not affect text defines, but undefineall doesMiodrag Milanovic2022-08-101-0/+4
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| * | Merge pull request #3322 from Forty-Bot/default_assignment_firstN. Engelhardt2022-08-101-10/+38
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| | * | Order ports with default assignments firstSean Anderson2022-08-091-10/+38
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| * | Bump versiongithub-actions[bot]2022-08-101-1/+1
| * | nexus: Fix BRAM mapping.Marcelina Kościelnicka2022-08-091-18/+56
| * | Merge pull request #3441 from YosysHQ/micko/smtio-utf-8Miodrag Milanović2022-08-091-2/+2
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| | * | Switched to utf-8 in smtio.pyMiodrag Milanovic2022-08-091-2/+2
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| * | properly encode string in rtlilMiodrag Milanovic2022-08-091-1/+1
| * | Bump versiongithub-actions[bot]2022-08-091-1/+1
| * | Merge pull request #3439 from YosysHQ/micko/filepath_improveMiodrag Milanović2022-08-0810-60/+90
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| | * support file locations containing spacesMiodrag Milanovic2022-08-086-18/+19
| | * Encode filename unprintable charsMiodrag Milanovic2022-08-084-27/+42
| | * verific - make filepath handling compatible with verilog frontendMiodrag Milanovic2022-08-081-15/+29
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| * Bump versiongithub-actions[bot]2022-08-041-1/+1
| * Next dev cycleMiodrag Milanovic2022-08-032-2/+5
| * Release version 0.20Miodrag Milanovic2022-08-032-3/+3
| * Update ChangelogMiodrag Milanovic2022-08-031-0/+7
| * update manual to latestMiodrag Milanovic2022-08-031-2/+5
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