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| * Fix abc9 with (* keep *) wiresEddie Hung2019-04-231-6/+14
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| * Revert "Temporarily remove 'r' extension"Eddie Hung2019-04-221-7/+77
| | | | | | | | This reverts commit eaf3c247729365cec776e147f380ce59f7dccd4d.
* | Fix issue where keep signal became PI, but also box was adding CI driverEddie Hung2019-05-301-5/+19
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* | Do not re-sort box_module portsEddie Hung2019-05-301-4/+6
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* | Carry in/out to be the last input/output for chains to be preservedEddie Hung2019-05-301-0/+38
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* | Fix abc_test024Eddie Hung2019-05-291-4/+5
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* | Fix for abc9_test022Eddie Hung2019-05-281-2/+6
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* | Small improvementEddie Hung2019-05-281-4/+2
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* | Map file to include boxes not CI/COEddie Hung2019-05-271-45/+38
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* | Instantiate cell type (from sym file) otherwise 'clean' warningsEddie Hung2019-05-271-2/+4
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* | Add 'cinput' and 'coutput' to symbols file for boxesEddie Hung2019-05-271-34/+24
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* | Fix "a" connectivityEddie Hung2019-05-261-5/+30
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* | Fix padding, remove CIs from undriven_bits before erasing undriven POsEddie Hung2019-05-261-14/+8
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* | Fix "a" extensionEddie Hung2019-05-261-8/+18
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* | Fix "write_xaiger", and to write each box contents into holesEddie Hung2019-05-251-39/+62
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* | Pad all boxes so that all input/output connections specifiedEddie Hung2019-05-211-22/+67
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* | Remove topo sort no-loop assertion, with testEddie Hung2019-04-241-13/+0
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* | Fix abc9 with (* keep *) wiresEddie Hung2019-04-231-6/+14
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* Temporarily remove 'r' extensionEddie Hung2019-04-221-77/+7
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* Allow POs to be PIs in XAIGEddie Hung2019-04-221-7/+4
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* Fixes for simple_abc9 testsEddie Hung2019-04-191-4/+8
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* Do not assume inst_module is always presentEddie Hung2019-04-191-12/+9
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* ignore_boxes -> holes_modeEddie Hung2019-04-191-6/+5
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* Add flop support for write_xaigerEddie Hung2019-04-181-11/+83
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* Use new -wb flag for ABC flowEddie Hung2019-04-181-29/+31
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* Fix $anyseq warning and cleanupEddie Hung2019-04-171-16/+7
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* Cope with inout portsEddie Hung2019-04-171-1/+15
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* Stop topological sort at abc_flop_qEddie Hung2019-04-171-7/+13
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* Remove init* from xaiger, also topo-sort cells for box flowEddie Hung2019-04-171-95/+157
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* OptimiseEddie Hung2019-04-161-4/+3
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* CIs before PIs; also sort each cell's connections before iteratingEddie Hung2019-04-161-5/+7
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* Port from xc7mux branchEddie Hung2019-04-161-37/+109
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* Output __const0__ and __const1__ CIsEddie Hung2019-04-121-7/+10
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* ci_bits and co_bits now a list, order is important for ABCEddie Hung2019-04-121-24/+34
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* WIPEddie Hung2019-04-121-14/+68
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* Add non-input bits driven by unrecognised cells as ci_bitsEddie Hung2019-04-101-1/+1
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* write_xaiger to behave for undriven/unused inoutsEddie Hung2019-02-261-23/+25
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* write_xaiger duplicate inout port into out port with $inout.out suffixEddie Hung2019-02-251-3/+26
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* Cleanup abc9 codeEddie Hung2019-02-251-13/+8
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* write_xaiger to write __dummy_o__ for -symbols tooEddie Hung2019-02-211-12/+11
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* Add attributionEddie Hung2019-02-211-0/+1
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* write_xaiger to use original bit for co, not sigmap()-ed bitEddie Hung2019-02-211-3/+6
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* write_aiger: fix CI/CO and symbolsEddie Hung2019-02-201-7/+13
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* write_xaiger to not write latches, CO/PO fixesEddie Hung2019-02-201-17/+26
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* CleanupEddie Hung2019-02-161-4/+5
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* CleanupEddie Hung2019-02-161-2/+1
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* write_xaiger to support non-bit cell connections, and cope with COs for -OEddie Hung2019-02-161-13/+15
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* write_aiger -O to write dummy output as __dummy_o__Eddie Hung2019-02-161-2/+5
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* Tidy up write_xaigerEddie Hung2019-02-161-8/+6
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* write_aiger() to perform CI/CO post-processing and fix symbolsEddie Hung2019-02-161-7/+17
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