| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Renamed opt_const to opt_expr | Clifford Wolf | 2016-03-31 | 1 | -1/+1 |
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| * | Another block of spelling fixes | Larry Doolittle | 2015-08-14 | 1 | -1/+1 |
| | | | | | Smaller this time | ||||
| * | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -6/+6 |
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| * | Removed "techmap -share_map" (use "-map +/filename" instead) | Clifford Wolf | 2015-04-08 | 1 | -1/+1 |
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| * | Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor | Ahmed Irfan | 2014-09-22 | 1 | -2/+2 |
| | | | | | | | | | | added case for memwr cell that is used in muxes (same cell is used more than one time) corrected bug for xnor and logic_not added pmux cell translation Conflicts: backends/btor/btor.cc | ||||
| * | modified btor synthesis script for correct use of splice command. | Ahmed Irfan | 2014-02-12 | 1 | -3/+2 |
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| * | disabling splice command in the script | Ahmed Irfan | 2014-02-11 | 1 | -1/+3 |
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| * | added concat and slice cell translation | Ahmed Irfan | 2014-02-11 | 1 | -2/+2 |
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| * | Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem) | Clifford Wolf | 2014-02-03 | 1 | -1/+2 |
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| * | Use techmap -share_map in btor scripts | Clifford Wolf | 2014-01-24 | 1 | -1/+1 |
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| * | Moved btor scripts to backends/btor/ | Clifford Wolf | 2014-01-24 | 1 | -0/+35 |
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index : iCE40/yosys | |
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