aboutsummaryrefslogtreecommitdiffstats
path: root/backends/cxxrtl/cxxrtl.h
Commit message (Collapse)AuthorAgeFilesLines
* write_cxxrtl: improve writable memory handling.whitequark2020-04-091-39/+64
| | | | | | This commit reduces space and time overhead for writable memories to O(write port count) in both cases; implements handling for write port priorities; and simplifies runtime representation of memories.
* write_cxxrtl: avoid undefined behavior on out-of-bounds memory access.whitequark2020-04-091-8/+13
| | | | | | | | | | After this commit, if NDEBUG is not defined, out-of-bounds accesses cause assertion failures for reads and writes. If NDEBUG is defined, out-of-bounds reads return zeroes, and out-of-bounds writes are ignored. This commit also adds support for memories that start with a non-zero index (`Memory::start_offset` in RTLIL).
* write_cxxrtl: statically schedule comb logic and localize wires.whitequark2020-04-091-0/+4
| | | | | | This results in further massive gains in performance, modest decrease in compile time, and, for designs without feedback arcs, makes it possible to run eval() once per clock edge in certain conditions.
* write_cxxrtl: new backend.whitequark2020-04-091-0/+1104
This commit adds a basic implementation that isn't very performant but implements most of the planned features.