iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	cxxrtl: implement debug information outlining.	whitequark	2020-12-14	1	-0/+4
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Aggressive wire localization and inlining is necessary for CXXRTL to achieve high performance. However, that comes with a cost: reduced debug information coverage. Previously, as a workaround, the `-Og` option could have been used to guarantee complete coverage, at a cost of a significant performance penalty. This commit introduces debug information outlining. The main eval() function is compiled with the user-specified optimization settings. In tandem, an auxiliary debug_eval() function, compiled from the same netlist, can be used to reconstruct the values of localized/inlined signals on demand. To the extent that it is possible, debug_eval() reuses the results of computations performed by eval(), only filling in the missing values. Benchmarking a representative design (Minerva SoC SRAM) shows that: * Switching from `-O4`/`-Og` to `-O6` reduces runtime by ~40%. * Switching from `-g1` to `-g2`, both used with `-O6`, increases compile time by ~25%. * Although `-g2` increases the resident size of generated modules, this has no effect on runtime. Because the impact of `-g2` is minimal and the benefits of having unconditional 100% debug information coverage (and the performance improvement as well) are major, this commit removes `-Og` and changes the defaults to `-O6 -g2`. We'll have our cake and eat it too!
*	cxxrtl: allow customizing the root module path in the C API.	whitequark	2020-12-03	1	-1/+14
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*	cxxrtl: provide a way to perform unobtrusive power-on reset.	whitequark	2020-12-02	1	-0/+4
\| \| \| \| \| \| \| \| \| \| \|	Although it is always possible to destroy and recreate the design to simulate a power-on reset, this has two drawbacks: * Black boxes are also destroyed and recreated, which causes them to reacquire their resources, which might be costly and/or erase important state. * Pointers into the design are invalidated and have to be acquired again, which is costly and might be very inconvenient if they are captured elsewhere (especially through the C API).
*	cxxrtl: expose eval() and commit() via the C API.	whitequark	2020-07-12	1	-0/+8
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*	cxxrtl: handle multipart signals.	whitequark	2020-06-11	1	-7/+10
\| \| \| \|	This avoids losing design visibility when using the `splitnets` pass.
*	cxxrtl: add a C API for writing VCD dumps.	whitequark	2020-06-07	1	-1/+6
\| \| \| \|	This C API is fully featured.
*	cxxrtl: add a C API for driving and introspecting designs.	whitequark	2020-06-06	1	-0/+55
	Compared to the C++ API, the C API currently has two limitations: 1. Memories cannot be updated in a race-free way. 2. Black boxes cannot be implemented in C.