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| * | Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-positionClifford Wolf2019-07-091-3/+2
| |\ \ | | | | | | | | write_verilog: fix placement of case attributes
| | * | write_verilog: fix placement of case attributes. NFC.whitequark2019-07-091-3/+2
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| * | Merge pull request #1170 from YosysHQ/eddie/fix_double_underscoreEddie Hung2019-07-091-4/+6
| |\ \ | | |/ | |/| Rename __builtin_bswap32 -> bswap32
| | * Rename __builtin_bswap32 -> bswap32Eddie Hung2019-07-091-4/+6
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| * | verilog_backend: dump attributes on SwitchRule.whitequark2019-07-081-0/+1
| | | | | | | | | | | | This appears to be an omission.
| * | verilog_backend: dump attributes on CaseRule, as comments.whitequark2019-07-081-6/+10
| | | | | | | | | | | | Attributes are not permitted in that position by Verilog grammar.
| * | Allow attributes on individual switch cases in RTLIL.whitequark2019-07-081-0/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parser changes are slightly awkward. Consider the following IL: process $0 <point 1> switch \foo <point 2> case 1'1 assign \bar \baz <point 3> ... case end end Before this commit, attributes are valid in <point 1>, and <point 3> iff it is immediately followed by a `switch`. (They are essentially attached to the switch.) But, after this commit, and because switch cases do not have an ending delimiter, <point 3> becomes ambiguous: the attribute could attach to either the following `case`, or to the following `switch`. This isn't expressible in LALR(1) and results in a reduce/reduce conflict. To address this, attributes inside processes are now valid anywhere inside the process: in <point 1> and <point 3> a part of case body, and in <point 2> as a separate rule. As a consequence, attributes can now precede `assign`s, which is made illegal in the same way it is illegal to attach attributes to `connect`. Attributes are tracked separately from the parser state, so this does not affect collection of attributes at all, other than allowing them on `case`s. The grammar change serves purely to allow attributes in more syntactic places.
| * write_xaiger to treat unknown cell connections as keep-sEddie Hung2019-07-021-6/+14
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* | Safe side: all flops have different mergeability classEddie Hung2019-07-021-1/+1
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* | Refactor and cope with new abc_flop formatEddie Hung2019-07-011-16/+38
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* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-07-017-102/+204
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| * Add generic __builtin_bswap32 functionEddie Hung2019-06-281-0/+15
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| * Also fix write_aiger for UBEddie Hung2019-06-281-26/+26
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| * Fix more potential for undefined behaviour due to container invalidationEddie Hung2019-06-281-6/+10
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| * Refactor for one "abc_carry" attribute on moduleEddie Hung2019-06-271-42/+40
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| * Merge origin/masterEddie Hung2019-06-272-4/+31
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| * Improve debugging message for comb loopsEddie Hung2019-06-261-4/+6
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| * Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-241-0/+4
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| | * Fix json formattingMiodrag Milanovic2019-06-211-1/+1
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| | * Add upto and offset to JSON portsMiodrag Milanovic2019-06-211-0/+4
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| * | Carry in/out box ordering now move to end, not swap with endEddie Hung2019-06-221-26/+34
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| * | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-211-0/+4
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| | * Added JSON upto and offsetClifford Wolf2019-06-211-0/+4
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Fix gcc invalidation behaviour for write_aigerEddie Hung2019-06-201-1/+2
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| * | Replace assert with error messageEddie Hung2019-06-211-1/+2
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| * | Add log_push()/log_pop() inside write_xaigerEddie Hung2019-06-211-0/+4
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| * | One more workaround for gcc-4.8Eddie Hung2019-06-211-3/+4
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| * | No point logging constant bitEddie Hung2019-06-211-1/+1
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| * | Move commentEddie Hung2019-06-211-2/+3
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| * | Fix spacingEddie Hung2019-06-201-1/+1
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| * | Refactor bit2aig for less lookupsEddie Hung2019-06-201-24/+27
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| * | Fix gcc invalidation behaviour for write_aigerEddie Hung2019-06-201-1/+2
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| * | Fix gcc error, due to dict invalidation during recursionEddie Hung2019-06-201-2/+3
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| * | write_xaiger to flatten 1'bx/1'bz to 1'b0 againEddie Hung2019-06-201-2/+4
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| * | Fix different abc9 testEddie Hung2019-06-201-2/+3
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| * | Fix broken abc9.v test due to inout being 1'bxEddie Hung2019-06-201-2/+11
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| * | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-205-0/+6
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| | * Support filename rewrite in backendsBen Widawsky2019-06-184-0/+4
| | | | | | | | | | | | Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
| | * Add timescale and generated-by header to yosys-smtbmc MkVcdClifford Wolf2019-06-161-0/+2
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | Handle COs driven by 1'bxEddie Hung2019-06-201-3/+9
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| * | write_xaiger to skip POs driven by 1'bxEddie Hung2019-06-201-3/+7
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| * | CleanupEddie Hung2019-06-161-228/+25
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* | | CleanupEddie Hung2019-06-161-39/+30
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* | | Cleanup write_xaigerEddie Hung2019-06-151-15/+10
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* | | Preserve init of flops, and write into XAIGEddie Hung2019-06-151-5/+30
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* | | Do not treat $__ABC_FF_ as a user cellEddie Hung2019-06-151-9/+9
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* | | Update commentEddie Hung2019-06-151-1/+1
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* | | Use $__ABC_FF_ instead of $_FF_Eddie Hung2019-06-151-2/+2
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* | | Update commentEddie Hung2019-06-151-1/+1
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* | | write_xaiger to treat abc_flop boxes as boxff for ABCEddie Hung2019-06-151-122/+105
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