aboutsummaryrefslogtreecommitdiffstats
path: root/frontends/ast/simplify.cc
Commit message (Collapse)AuthorAgeFilesLines
...
* Add $allconst and $allseq cell typesClifford Wolf2018-02-231-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for "yosys -E"Clifford Wolf2018-01-071-0/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix error handling for nested always/initialClifford Wolf2017-12-021-0/+3
|
* Remove some dead codeClifford Wolf2017-10-101-15/+0
|
* Allow $past, $stable, $rose, $fell in $global_clock blocksClifford Wolf2017-10-101-1/+5
|
* Allow $size and $bits in verilog mode, actually check test caseClifford Wolf2017-09-291-1/+1
|
* $size() now works correctly for all cases!Udi Finkelstein2017-09-261-17/+17
| | | | It seems the issues was that AST_MULTIRANGE is converted into a multirange_dimensions[] array on the AST_MEMORY node directly.
* $size() seems to work now with or without the optional parameter.Udi Finkelstein2017-09-261-10/+40
| | | | Multidimensional arrays still don't work. I suspect the problem is that the array is flattened into a 1D array before $size() is evaluated.
* enable $bits() and $size() functions only when the SystemVerilog flag is ↵Udi Finkelstein2017-09-261-1/+1
| | | | enabled for read_verilog
* Added $bits() for memories as well.Udi Finkelstein2017-09-261-2/+26
|
* $size() now works with memories as well!Udi Finkelstein2017-09-261-1/+3
|
* Add $size() function. At the moment it works only on expressions, not on ↵Udi Finkelstein2017-09-261-0/+14
| | | | memories.
* Add $live and $fair cell types, add support for s_eventually keywordClifford Wolf2017-02-251-2/+2
|
* Fix incorrect "incompatible re-declaration of wire" error in tasks/functionsClifford Wolf2017-02-141-2/+9
|
* Add $cover cell type and SVA cover() supportClifford Wolf2017-02-041-2/+2
|
* Fix bug in AstNode::mem2reg_as_needed_pass2()Clifford Wolf2017-01-151-0/+2
|
* Fixed handling of local memories in functionsClifford Wolf2017-01-051-2/+2
|
* Added handling of local memories and error for local decls in unnamed blocksClifford Wolf2017-01-041-1/+10
|
* Added Verilog $rtoi and $itor supportClifford Wolf2017-01-031-24/+30
|
* Added support for hierarchical defparamsClifford Wolf2016-11-151-11/+32
|
* Fixed anonymous genblock object namesClifford Wolf2016-11-041-1/+1
|
* Some fixes in handling of signed arraysClifford Wolf2016-11-011-0/+6
|
* Added $anyseq cell typeClifford Wolf2016-10-141-2/+2
|
* Added $past, $stable, $rose, $fell SVA functionsClifford Wolf2016-09-191-2/+131
|
* Avoid creation of bogus initial blocks for assert/assume in always @*Clifford Wolf2016-09-061-1/+11
|
* Removed $aconst cell typeClifford Wolf2016-08-301-2/+2
|
* Removed $predict againClifford Wolf2016-08-281-2/+2
|
* Fixed bug with memories that do not have a down-to-zero data widthClifford Wolf2016-08-221-2/+13
|
* Another bugfix in mem2reg codeClifford Wolf2016-08-211-6/+28
|
* Fixed finish_addr handling in $readmemh/$readmembClifford Wolf2016-08-201-3/+3
|
* Optimize memory address port width in wreduce and memory_collect, not ↵Clifford Wolf2016-08-191-0/+5
| | | | verilog front-end
* Added $anyconst and $aconstClifford Wolf2016-07-271-0/+4
|
* Using $initstate in "initial assume" and "initial assert"Clifford Wolf2016-07-211-1/+6
|
* Added $initstate cell type and vlog functionClifford Wolf2016-07-211-0/+24
|
* After reading the SV spec, using non-standard predict() instead of expect()Clifford Wolf2016-07-211-2/+2
|
* Added basic support for $expect cellsClifford Wolf2016-07-131-5/+7
|
* Fixed mem assignment in left-hand-side concatenationClifford Wolf2016-07-081-0/+44
|
* Fixed access-after-delete bug in mem2reg codeClifford Wolf2016-05-271-6/+22
|
* Fixed handling of parameters and const functions in casex/casez patternClifford Wolf2016-04-211-3/+15
|
* Do not set "nosync" on task outputs, fixes #134Clifford Wolf2016-03-241-1/+2
|
* Added support for $stop system taskClifford Wolf2016-03-211-5/+5
|
* Added $display %m support, fixed mem leak in $display, fixes #128Clifford Wolf2016-03-191-20/+44
|
* Fixed localparam signdness, fixes #127Clifford Wolf2016-03-181-1/+1
|
* Set "nosync" attribute on internal task/function wiresClifford Wolf2016-03-181-0/+1
|
* Fixed some visual studio warningsClifford Wolf2016-02-131-2/+2
|
* Fixed handling of re-declarations of wires in tasks and functionsClifford Wolf2015-11-231-7/+26
|
* More bugfixes in handling of parameters in tasks and functionsClifford Wolf2015-11-121-1/+11
|
* Fixed handling of parameters and localparams in functionsClifford Wolf2015-11-111-3/+3
|
* Import more std:: stuff into Yosys namespaceClifford Wolf2015-10-251-12/+12
|
* Fixed complexity of assigning to vectors in constant functionsClifford Wolf2015-10-011-0/+3
|
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-05 07:06:50 +0000