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* sv: fix some edge cases for unbased unsized literalsZachary Snow2021-03-061-1/+21
| | | | | | - Fix explicit size cast of unbased unsized literals - Fix unbased unsized literal bound directly to port - Output `is_unsized` flag in `dumpAst`
* Implement $countones, $isunknown and $onehot{,0}Michael Singer2021-02-261-0/+28
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* Implement $countbits functionMichael Singer2021-02-261-0/+59
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* Extend simplify() recursion warningZachary Snow2021-02-261-1/+1
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* frontend: Make helper functions for printing locations.Marcelina Kościelnicka2021-02-231-24/+24
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* Merge pull request #2594 from zachjs/func-arg-widthwhitequark2021-02-231-9/+23
|\ | | | | verilog: fix sizing of constant args for tasks/functions
| * verilog: fix sizing of constant args for tasks/functionsZachary Snow2021-02-211-9/+23
| | | | | | | | | | | | | | | | | | | | | | | | - Simplify synthetic localparams for normal calls to update their width - This step was inadvertently removed alongside `added_mod_children` - Support redeclaration of constant function arguments - `eval_const_function` never correctly handled this, but the issue was not exposed in the existing tests until the recent change to always attempt constant function evaluation when all-const args are used - Check asserts in const_arg_loop and const_func tests - Add coverage for width mismatch error cases
* | verilog: support recursive functions using ternary expressionsZachary Snow2021-02-121-19/+81
|/ | | | | | | This adds a mechanism for marking certain portions of elaboration as occurring within unevaluated ternary branches. To enable elaboration of the overall ternary, this also adds width detection for these unelaborated function calls.
* verilog: refactored constant function evaluationZachary Snow2021-02-041-68/+79
| | | | | | | | | | | Elaboration now attempts constant evaluation of any function call with only constant arguments, regardless of the context or contents of the function. This removes the concept of "recommended constant evaluation" which previously applied to functions with `for` loops or which were (sometimes erroneously) identified as recursive. Any function call in a constant context (e.g., `localparam`) or which contains a constant-only procedural construct (`while` or `repeat`) in its body will fail as before if constant evaluation does not succeed.
* verilog: significant block scoping improvementsZachary Snow2021-01-311-129/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change set contains a number of bug fixes and improvements related to scoping and resolution in generate and procedural blocks. While many of the frontend changes are interdependent, it may be possible bring the techmap changes in under a separate PR. Declarations within unnamed generate blocks previously encountered issues because the data declarations were left un-prefixed, breaking proper scoping. The LRM outlines behavior for generating names for unnamed generate blocks. The original goal was to add this implicit labelling, but doing so exposed a number of issues downstream. Additional testing highlighted other closely related scope resolution issues, which have been fixed. This change also adds support for block item declarations within unnamed blocks in SystemVerilog mode. 1. Unlabled generate blocks are now implicitly named according to the LRM in `label_genblks`, which is invoked at the beginning of module elaboration 2. The Verilog parser no longer wraps explicitly named generate blocks in a synthetic unnamed generate block to avoid creating extra hierarchy levels where they should not exist 3. The techmap phase now allows special control identifiers to be used outside of the topmost scope, which is necessary because such wires and cells often appear in unlabeled generate blocks, which now prefix the declarations within 4. Some techlibs required modifications because they relied on the previous invalid scope resolution behavior 5. `expand_genblock` has been simplified, now only expanding the outermost scope, completely deferring the inspection and elaboration of nested scopes; names are now resolved by looking in the innermost scope and stepping outward 6. Loop variables now always become localparams during unrolling, allowing them to be resolved and shadowed like any other identifier 7. Identifiers in synthetic function call scopes are now prefixed and resolved in largely the same manner as other blocks before: `$func$\func_01$tests/simple/scopes.blk.v:60$5$\blk\x` after: `\func_01$func$tests/simple/scopes.v:60$5.blk.x` 8. Support identifiers referencing a local generate scope nested more than 1 level deep, i.e. `B.C.x` while within generate scope `A`, or using a prefix of a current or parent scope, i.e. `B.C.D.x` while in `A.B`, `A.B.C`, or `A.B.C.D` 9. Variables can now be declared within unnamed blocks in SystemVerilog mode Addresses the following issues: 656, 2423, 2493
* Fix input/output attributes when resolving typedef of wireKamil Rakoczy2021-01-181-0/+3
| | | | Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
* verilog: improved support for recursive functionsZachary Snow2020-12-311-8/+26
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* Fix elaboration of whole memory words used as indicesZachary Snow2020-12-261-1/+8
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* Fix constants bound to redeclared function argsZachary Snow2020-12-261-5/+16
| | | | | | | | The changes in #2476 ensured that function inputs like `input x;` retained their single-bit size when instantiated with a constant argument and turned into a localparam. That change did not handle the possibility for an input to be redeclared later on with an explicit width, such as `integer x;`.
* Merge pull request #2476 from zachjs/const-arg-widthwhitequark2020-12-231-0/+8
|\ | | | | Fix constants bound to single bit arguments (fixes #2383)
| * Fix constants bound to single bit arguments (fixes #2383)Zachary Snow2020-12-221-0/+8
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* | Allow constant function calls in constant function argumentsZachary Snow2020-12-071-0/+5
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* Merge pull request #2378 from udif/pr_dollar_high_lowclairexen2020-10-011-31/+91
|\ | | | | Added $high(), $low(), $left(), $right()
| * We can now handle array slices (e.g. $size(x[1]) etc. )Udi Finkelstein2020-09-171-7/+6
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| * Fixed comments, removed debug messageUdi Finkelstein2020-09-161-5/+5
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| * Added $high(), $low(), $left(), $right()Udi Finkelstein2020-09-151-30/+91
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* | Merge pull request #2330 from antmicro/arrays-fix-multirange-accessclairexen2020-09-171-1/+1
|\ \ | |/ |/| Fix unsupported subarray access detection
| * Fix subarray access conditionLukasz Dalek2020-08-031-1/+1
| | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
* | Merge pull request #2352 from zachjs/const-func-localparamclairexen2020-09-011-0/+12
|\ \ | | | | | | Allow localparams in constant functions
| * | Allow localparams in constant functionsZachary Snow2020-08-201-0/+12
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* | | Merge pull request #2366 from zachjs/library-formatclairexen2020-09-011-0/+11
|\ \ \ | | | | | | | | Simple support for %l format specifier
| * | | Simple support for %l format specifierZachary Snow2020-08-291-0/+11
| |/ / | | | | | | | | | | | | Yosys doesn't support libraries, so this provides the same behavior as %m, as some other tools have opted to do.
* | | Merge pull request #2353 from zachjs/top-scopeclairexen2020-09-011-0/+7
|\ \ \ | | | | | | | | Module name scope support
| * | | Module name scope supportZachary Snow2020-08-201-0/+7
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* / / Fix constant args used with function ports split across declarationsZachary Snow2020-08-291-3/+4
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* | Merge pull request #2122 from PeterCrozier/struct_array2clairexen2020-08-191-28/+62
|\ \ | | | | | | Support 2D bit arrays in structures. Optimise array indexing.
| * | Support 2D packed bit arrays in struct/union.Peter Crozier2020-06-091-35/+1
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| * | Support 2D bit arrays in structures. Optimise array indexing.Peter Crozier2020-06-081-28/+96
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* | | Merge pull request #2339 from zachjs/display-format-0sclairexen2020-08-181-1/+1
|\ \ \ | | | | | | | | Allow %0s $display format specifier
| * | | Allow %0s $display format specifierZachary Snow2020-08-091-1/+1
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* | | Merge pull request #2338 from zachjs/const-branch-finishclairexen2020-08-181-4/+4
|\ \ \ | | | | | | | | Propagate const_fold through generate blocks and branches
| * | | Propagate const_fold through generate blocks and branchesZachary Snow2020-08-091-4/+4
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* | | Merge pull request #2317 from zachjs/expand-genblockclairexen2020-08-181-41/+82
|\ \ \ | | | | | | | | Fix generate scoping issues
| * | | Fix generate scoping issuesZachary Snow2020-07-311-41/+82
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | - expand_genblock defers prefixing of items within named sub-blocks - Allow partially-qualified references to local scopes - Handle shadowing within generate blocks - Resolve generate scope references within tasks and functions - Apply generate scoping to genvars - Resolves #2214, resolves #1456
* | | Merge branch 'const-func-block-var' of https://github.com/zachjs/yosys into ↵Claire Wolf2020-08-181-26/+29
|\ \ \ | | | | | | | | | | | | | | | | | | | | zachjs-const-func-block-var Signed-off-by: Claire Wolf <claire@symbioticeda.com>
| * | | Allow blocks with declarations within constant functionsZachary Snow2020-07-251-18/+21
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* | | | Merge pull request #2281 from zachjs/const-realclairexen2020-08-181-3/+11
|\ \ \ \ | |_|/ / |/| | | Allow reals as constant function parameters
| * | | Allow reals as constant function parametersZachary Snow2020-07-191-3/+11
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* | | Merge pull request #2301 from zachjs/for-loop-errorsclairexen2020-07-281-17/+19
|\ \ \ | | | | | | | | Clearer for loop error messages
| * | | Clearer for loop error messagesZachary Snow2020-07-251-17/+19
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* / / Avoid generating wires for function args which are constantZachary Snow2020-07-241-0/+28
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* | Add AST_EDGE support to AstNode::detect_latch(), fixes #2241Claire Wolf2020-07-101-0/+2
| | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com>
* | Merge pull request #2179 from splhack/static-castclairexen2020-07-011-0/+8
|\ \ | | | | | | Support SystemVerilog Static Cast
| * | static cast: simplifyKazuki Sakamoto2020-06-191-0/+7
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| * | static cast: support changing size and signednessKazuki Sakamoto2020-06-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support SystemVerilog Static Cast - size - signedness - (type is not supposted yet) Fix #535
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