iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02	1	-2/+2
*	Ignore celldefine directive in verilog front-end	Clifford Wolf	2015-03-25	1	-0/+3
*	Added non-std verilog assume() statement	Clifford Wolf	2015-02-26	1	-2/+3
*	Fixed handling of "//" in filenames in verilog pre-processor	Clifford Wolf	2015-02-14	1	-0/+4
*	Ignoring more system task and functions	Clifford Wolf	2015-01-15	1	-1/+1
*	Improved some warning messages	Clifford Wolf	2014-12-27	1	-6/+18
*	Fixed minor bug in parsing delays	Clifford Wolf	2014-11-24	1	-1/+4
*	Fixed two minor bugs in constant parsing	Clifford Wolf	2014-11-24	1	-2/+2
*	Added log_warning() API	Clifford Wolf	2014-11-09	1	-6/+6
*	Re-introduced Yosys::readsome() helper function	Clifford Wolf	2014-10-23	1	-5/+1
*	Updated lexers & parsers to include prefixes	William Speirs	2014-10-15	1	-0/+359