iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
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*	Add a paragraph about pre-defined macros to read_verilog help message	Clifford Wolf	2017-07-21	1	-0/+4
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*	Fix generation of vlogtb output in yosys-smtbmc for "rand reg" and "rand ↵	Clifford Wolf	2017-06-07	1	-0/+1
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*	Fix handling of Verilog ~& and ~\| operators	Clifford Wolf	2017-06-01	1	-0/+8
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*	Add support for localparam in module header	Clifford Wolf	2017-04-30	1	-1/+7
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*	Add support for `resetall compiler directive	Clifford Wolf	2017-04-26	1	-0/+7
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*	Fix verilog pre-processor for multi-level relative includes	Clifford Wolf	2017-03-14	1	-4/+26
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*	Allow $anyconst, etc. in non-formal SV mode	Clifford Wolf	2017-03-01	1	-1/+1
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*	Add $live and $fair cell types, add support for s_eventually keyword	Clifford Wolf	2017-02-25	2	-1/+28
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*	Add support for SystemVerilog unique, unique0, and priority case	Clifford Wolf	2017-02-23	2	-4/+25
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*	Added SystemVerilog support for ++ and --	Clifford Wolf	2017-02-23	2	-1/+12
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*	Add checker support to verilog front-end	Clifford Wolf	2017-02-09	2	-11/+24
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*	Add SV "rand" and "const rand" support	Clifford Wolf	2017-02-08	2	-8/+28
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*	Further improve cover() support	Clifford Wolf	2017-02-04	1	-0/+6
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*	Add $cover cell type and SVA cover() support	Clifford Wolf	2017-02-04	2	-1/+8
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*	Add "enum" and "typedef" lexer support	Clifford Wolf	2017-01-17	2	-1/+4
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*	Added "verilog_defines" command	Clifford Wolf	2016-12-15	1	-0/+60
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*	Added support for macros as include file names	Clifford Wolf	2016-11-28	1	-0/+2
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*	Bugfix in "read_verilog -D NAME=VAL" handling	Clifford Wolf	2016-11-28	1	-3/+3
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*	Added support for hierarchical defparams	Clifford Wolf	2016-11-15	1	-3/+2
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*	Remember global declarations and defines accross read_verilog calls	Clifford Wolf	2016-11-15	3	-3/+17
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*	Added $anyseq cell type	Clifford Wolf	2016-10-14	1	-1/+1
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*	Removed $aconst cell type	Clifford Wolf	2016-08-30	1	-1/+1
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*	Removed $predict again	Clifford Wolf	2016-08-28	2	-8/+1
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*	Added read_verilog -norestrict -assume-asserts	Clifford Wolf	2016-08-26	4	-5/+40
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*	Improved verilog parser errors	Clifford Wolf	2016-08-25	1	-0/+3
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*	Added SV "restrict" keyword	Clifford Wolf	2016-08-24	1	-1/+2
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*	Fixed bug in parsing real constants	Clifford Wolf	2016-08-06	1	-4/+4
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*	Added $anyconst and $aconst	Clifford Wolf	2016-07-27	1	-1/+1
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*	Added "read_verilog -dump_rtlil"	Clifford Wolf	2016-07-27	1	-1/+9
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*	Fixed a verilog parser memory leak	Clifford Wolf	2016-07-25	1	-0/+1
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*	Fixed parsing of empty positional cell ports	Clifford Wolf	2016-07-25	1	-2/+31
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*	No tristate warning message for "read_verilog -lib"	Clifford Wolf	2016-07-23	3	-8/+11
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*	Added $initstate cell type and vlog function	Clifford Wolf	2016-07-21	1	-0/+2
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*	After reading the SV spec, using non-standard predict() instead of expect()	Clifford Wolf	2016-07-21	2	-6/+10
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*	Added basic support for $expect cells	Clifford Wolf	2016-07-13	2	-1/+9
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*	Allow defining input ports as "input logic" in SystemVerilog	Ruben Undheim	2016-06-20	1	-2/+2
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*	Added support for SystemVerilog packages with localparam definitions	Ruben Undheim	2016-06-18	2	-0/+33
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*	Small improvements in Verilog front-end docs	Clifford Wolf	2016-05-20	1	-0/+3
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*	Added "yosys -D" feature	Clifford Wolf	2016-04-21	1	-1/+1
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*	Fixed handling of parameters and const functions in casex/casez pattern	Clifford Wolf	2016-04-21	1	-2/+6
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*	Fixed Verilog parser fix and more similar improvements	Clifford Wolf	2016-03-15	1	-18/+9
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*	Use left-recursive rule for cell_port_list in Verilog parser.	Andrew Becker	2016-03-15	1	-6/+10
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*	Fixed typos in verilog_defaults help message	Clifford Wolf	2016-03-10	1	-3/+3
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*	Fixed handling of parameters and localparams in functions	Clifford Wolf	2015-11-11	1	-1/+1
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*	Fixed bug in verilog parser	Clifford Wolf	2015-10-15	1	-1/+1
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*	SystemVerilog also has assume(), added implicit -D FORMAL	Clifford Wolf	2015-10-13	3	-4/+5
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*	Added support for "parameter" and "localparam" in global context	Clifford Wolf	2015-10-07	1	-0/+2
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*	Added read_verilog -nodpi	Clifford Wolf	2015-09-23	1	-0/+19
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*	Fixed support for $write system task	Clifford Wolf	2015-09-23	1	-1/+1
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*	Fixed detection of "task foo(bar);" syntax error	Clifford Wolf	2015-09-22	1	-0/+2
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