iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
...
*	Add $live and $fair cell types, add support for s_eventually keyword	Clifford Wolf	2017-02-25	2	-1/+28
\|
*	Add support for SystemVerilog unique, unique0, and priority case	Clifford Wolf	2017-02-23	2	-4/+25
\|
*	Added SystemVerilog support for ++ and --	Clifford Wolf	2017-02-23	2	-1/+12
\|
*	Add checker support to verilog front-end	Clifford Wolf	2017-02-09	2	-11/+24
\|
*	Add SV "rand" and "const rand" support	Clifford Wolf	2017-02-08	2	-8/+28
\|
*	Further improve cover() support	Clifford Wolf	2017-02-04	1	-0/+6
\|
*	Add $cover cell type and SVA cover() support	Clifford Wolf	2017-02-04	2	-1/+8
\|
*	Add "enum" and "typedef" lexer support	Clifford Wolf	2017-01-17	2	-1/+4
\|
*	Added "verilog_defines" command	Clifford Wolf	2016-12-15	1	-0/+60
\|
*	Added support for macros as include file names	Clifford Wolf	2016-11-28	1	-0/+2
\|
*	Bugfix in "read_verilog -D NAME=VAL" handling	Clifford Wolf	2016-11-28	1	-3/+3
\|
*	Added support for hierarchical defparams	Clifford Wolf	2016-11-15	1	-3/+2
\|
*	Remember global declarations and defines accross read_verilog calls	Clifford Wolf	2016-11-15	3	-3/+17
\|
*	Added $anyseq cell type	Clifford Wolf	2016-10-14	1	-1/+1
\|
*	Removed $aconst cell type	Clifford Wolf	2016-08-30	1	-1/+1
\|
*	Removed $predict again	Clifford Wolf	2016-08-28	2	-8/+1
\|
*	Added read_verilog -norestrict -assume-asserts	Clifford Wolf	2016-08-26	4	-5/+40
\|
*	Improved verilog parser errors	Clifford Wolf	2016-08-25	1	-0/+3
\|
*	Added SV "restrict" keyword	Clifford Wolf	2016-08-24	1	-1/+2
\|
*	Fixed bug in parsing real constants	Clifford Wolf	2016-08-06	1	-4/+4
\|
*	Added $anyconst and $aconst	Clifford Wolf	2016-07-27	1	-1/+1
\|
*	Added "read_verilog -dump_rtlil"	Clifford Wolf	2016-07-27	1	-1/+9
\|
*	Fixed a verilog parser memory leak	Clifford Wolf	2016-07-25	1	-0/+1
\|
*	Fixed parsing of empty positional cell ports	Clifford Wolf	2016-07-25	1	-2/+31
\|
*	No tristate warning message for "read_verilog -lib"	Clifford Wolf	2016-07-23	3	-8/+11
\|
*	Added $initstate cell type and vlog function	Clifford Wolf	2016-07-21	1	-0/+2
\|
*	After reading the SV spec, using non-standard predict() instead of expect()	Clifford Wolf	2016-07-21	2	-6/+10
\|
*	Added basic support for $expect cells	Clifford Wolf	2016-07-13	2	-1/+9
\|
*	Allow defining input ports as "input logic" in SystemVerilog	Ruben Undheim	2016-06-20	1	-2/+2
\|
*	Added support for SystemVerilog packages with localparam definitions	Ruben Undheim	2016-06-18	2	-0/+33
\|
*	Small improvements in Verilog front-end docs	Clifford Wolf	2016-05-20	1	-0/+3
\|
*	Added "yosys -D" feature	Clifford Wolf	2016-04-21	1	-1/+1
\|
*	Fixed handling of parameters and const functions in casex/casez pattern	Clifford Wolf	2016-04-21	1	-2/+6
\|
*	Fixed Verilog parser fix and more similar improvements	Clifford Wolf	2016-03-15	1	-18/+9
\|
*	Use left-recursive rule for cell_port_list in Verilog parser.	Andrew Becker	2016-03-15	1	-6/+10
\|
*	Fixed typos in verilog_defaults help message	Clifford Wolf	2016-03-10	1	-3/+3
\|
*	Fixed handling of parameters and localparams in functions	Clifford Wolf	2015-11-11	1	-1/+1
\|
*	Fixed bug in verilog parser	Clifford Wolf	2015-10-15	1	-1/+1
\|
*	SystemVerilog also has assume(), added implicit -D FORMAL	Clifford Wolf	2015-10-13	3	-4/+5
\|
*	Added support for "parameter" and "localparam" in global context	Clifford Wolf	2015-10-07	1	-0/+2
\|
*	Added read_verilog -nodpi	Clifford Wolf	2015-09-23	1	-0/+19
\|
*	Fixed support for $write system task	Clifford Wolf	2015-09-23	1	-1/+1
\|
*	Fixed detection of "task foo(bar);" syntax error	Clifford Wolf	2015-09-22	1	-0/+2
\|
*	Fixed segfault on invalid verilog constant 1'b_	Clifford Wolf	2015-09-22	1	-1/+1
\|
*	Small corrections to const2ast warning messages	Clifford Wolf	2015-08-17	1	-2/+2
\|
*	Check base-n literals only contain valid digits	Florian Zeitz	2015-08-17	1	-0/+3
\|
*	Warn on literals exceeding the specified bit width	Florian Zeitz	2015-08-17	1	-34/+39
\|
*	Another block of spelling fixes	Larry Doolittle	2015-08-14	2	-3/+3
\| \| \| \|	Smaller this time
*	Re-created command-reference-manual.tex, copied some doc fixes to online help	Clifford Wolf	2015-08-14	1	-6/+6
\|
*	Spell check (by Larry Doolittle)	Clifford Wolf	2015-08-14	1	-1/+1
\|