Commit message (Collapse) | Author | Age | Files | Lines | |
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* | frontend: Include complete source location instead of just ↵ | Alberto Gonzalez | 2020-05-01 | 1 | -13/+13 |
| | | | | `location.first_line` in `frontends/ast/genrtlil.cc`. | ||||
* | verific: do not assert if wire not found; warn instead | Eddie Hung | 2020-04-23 | 1 | -2/+6 |
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* | verific: import enum attributes from verific | Eddie Hung | 2020-04-22 | 1 | -0/+20 |
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* | ilang, ast: Store parameter order and default value information. | Marcelina Kościelnicka | 2020-04-21 | 3 | -5/+13 |
| | | | | Fixes #1819, #1820. | ||||
* | Merge pull request #1851 from YosysHQ/claire/bitselwrite | Claire Wolf | 2020-04-21 | 4 | -15/+207 |
|\ | | | | | Improved rewrite code for writing to bit slice | ||||
| * | Make mask-and-shift the default for bitselwrite | Claire Wolf | 2020-04-16 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
| * | Add LookaheadRewriter for proper bitselwrite support | Claire Wolf | 2020-04-16 | 4 | -4/+144 |
| | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
| * | Improved rewrite code for writing to bit slice (disabled for now) | Claire Wolf | 2020-04-15 | 1 | -12/+64 |
| | | | | | | | | | | | | | | | | | | This adds the new rewrite rule. But it's still missing a check that makes sure the new rewrite rule is actually a valid substitute in the always block being processed. Therefore the new rewrite rule is just disabled for now. Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | | Merge pull request #1961 from whitequark/paramod-original-name | whitequark | 2020-04-21 | 2 | -0/+5 |
|\ \ | | | | | | | ast, rpc: record original name of $paramod\* as \hdlname attribute | ||||
| * | | ast, rpc: record original name of $paramod\* as \hdlname attribute. | whitequark | 2020-04-18 | 2 | -0/+5 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The $paramod name mangling is not invertible (the \ character, which separates the module name from the parameters, is valid in the module name itself), which does not stop people from trying to invert it. This commit makes it easy to invert the name mangling by storing the original name explicitly, and fixes the firrtl backend to use the newly introduced attribute. | ||||
* | | | Extend support for format strings in Verilog front-end | Claire Wolf | 2020-04-18 | 1 | -8/+38 |
| | | | | | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | | | Set Verilog source location for explicit blocks (`begin` ... `end`). | Alberto Gonzalez | 2020-04-17 | 1 | -0/+1 |
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* | | | Add Verilog source location information to `AST_POSEDGE` and `AST_NEGEDGE` ↵ | Alberto Gonzalez | 2020-04-17 | 1 | -0/+2 |
|/ / | | | | | | | nodes. | ||||
* | | Add location information to `AST_CONSTANT` nodes. | Alberto Gonzalez | 2020-04-16 | 1 | -0/+3 |
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* | | ast: Fix handling of identifiers in the global scope | David Shah | 2020-04-16 | 2 | -2/+7 |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #1918 from whitequark/simplify-improve_enum | whitequark | 2020-04-15 | 1 | -5/+3 |
|\ | | | | | ast/simplify: improve enum handling | ||||
| * | ast/simplify: improve enum handling. | whitequark | 2020-04-15 | 1 | -5/+3 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, enum values were serialized as attributes of form \enum_<width>_<value> where <value> was a decimal signed integer. This has multiple drawbacks: * Enums with large values would be hard to process for downstream tooling that cannot parse arbitrary precision decimals. (In fact Yosys also did not correctly process enums with large values, and would overflow `int`.) * Enum value attributes were not confined to their own namespace, making it harder for downstream tooling to enumerate all such attributes, as opposed to looking up any specific value. * Enum values could not include x or z, which are explicitly permitted in the SystemVerilog standard. After this commit, enum values are serialized as attributes of form \enum_value_<value> where <value> is a bit sequence of the appropriate width. | ||||
* | | Fix 5bba9c3, closes #1876 | Claire Wolf | 2020-04-14 | 1 | -7/+13 |
| | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | | Merge pull request #1879 from jjj11x/jjj11x/package_decl | whitequark | 2020-04-14 | 2 | -1/+25 |
|\ \ | | | | | | | support using previously declared types/localparams/parameters in package | ||||
| * | | support using previously declared types/localparams/params in package | Jeff Wang | 2020-04-07 | 2 | -1/+25 |
| | | | | | | | | | | | | | | | | | | | | | (parameters in systemverilog packages can't actually be overridden, so allowing parameters in addition to localparams doesn't actually add any new functionality, but it's useful to be able to use the parameter keyword also) | ||||
* | | | Merge pull request #1880 from jjj11x/duplicate_enum | whitequark | 2020-04-14 | 1 | -2/+3 |
|\ \ \ | |_|/ |/| | | duplicated enum item names should result in an error | ||||
| * | | duplicated enum item names should result in an error | Jeff Wang | 2020-04-07 | 1 | -2/+3 |
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* | | Merge pull request #1910 from boqwxp/cleanup_ilang_parser | whitequark | 2020-04-13 | 1 | -4/+4 |
|\ \ | | | | | | | Clean up pseudo-private member usage in `frontends/ilang/ilang_parser.y`. | ||||
| * | | Clean up pseudo-private member usage in `frontends/ilang/ilang_parser.y`. | Alberto Gonzalez | 2020-04-13 | 1 | -4/+4 |
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* | | | verilog: Fix write to deleted object | David Shah | 2020-04-12 | 1 | -1/+0 |
|/ / | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | Merge pull request #1875 from whitequark/read_ilang-int_overflow | whitequark | 2020-04-09 | 2 | -2/+14 |
|\ \ | | | | | | | Improve handling of integer literals in RTLIL frontend | ||||
| * | | read_ilang: improve style. NFC. | whitequark | 2020-04-06 | 1 | -2/+1 |
| | | | | | | | | | Co-Authored-By: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com> | ||||
| * | | read_ilang: improve error message for overly long wires. | whitequark | 2020-04-06 | 1 | -0/+3 |
| | | | | | | | | | | | | Fixes #1838. | ||||
| * | | read_ilang: detect overflow of integer literals. | whitequark | 2020-04-06 | 1 | -1/+11 |
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* / | aigerparse: only define __STDC_FORMAT_MACROS it not already before. | Henner Zeller | 2020-04-07 | 1 | -0/+2 |
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* | Merge pull request #1853 from YosysHQ/eddie/fix_dynslice | Eddie Hung | 2020-04-02 | 1 | -1/+2 |
|\ | | | | | ast: cap dynamic range select to size of signal, suppresses warnings | ||||
| * | ast: cap dynamic range select to size of signal, suppresses warnings | Eddie Hung | 2020-04-01 | 1 | -1/+2 |
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* | | Merge pull request #1767 from YosysHQ/eddie/idstrings | Eddie Hung | 2020-04-02 | 9 | -449/+437 |
|\ \ | | | | | | | IdString: use more ID::*, make them easier to use, speed up IdString::in() | ||||
| * | | kernel: big fat patch to use more ID::*, otherwise ID(*) | Eddie Hung | 2020-04-02 | 8 | -313/+301 |
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| * | | kernel: use more ID::* | Eddie Hung | 2020-04-02 | 9 | -142/+142 |
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* | | | Merge pull request #1846 from dh73/ast_fe | Claire Wolf | 2020-04-02 | 1 | -0/+3 |
|\ \ \ | |/ / |/| | | Adding error message for when size (width) of number literal is zero | ||||
| * | | Replacing log_error for log_file_error due consistency | Diego H | 2020-03-31 | 1 | -2/+1 |
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| * | | Adding error message for when size (width) of number literal is zero | Diego H | 2020-03-30 | 1 | -0/+4 |
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* | | | Merge pull request #1845 from YosysHQ/eddie/kernel_speedup | Eddie Hung | 2020-04-02 | 3 | -38/+44 |
|\ \ \ | | | | | | | | | kernel: speedup by using more pass-by-const-ref | ||||
| * | | | kernel: more pass by const ref, more speedups | Eddie Hung | 2020-03-18 | 3 | -38/+44 |
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* | | | | Merge pull request #1844 from YosysHQ/dave/gen-source-loc | David Shah | 2020-04-01 | 1 | -0/+6 |
|\ \ \ \ | | | | | | | | | | | verilog: Add location info for generate constructs | ||||
| * | | | | verilog: Add location info for generate constructs | David Shah | 2020-04-01 | 1 | -0/+6 |
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | | | | Merge pull request #1848 from YosysHQ/eddie/fix_dynslice | Claire Wolf | 2020-04-01 | 1 | -1/+1 |
|\ \ \ \ \ | |_|_|/ / |/| | | / | | |_|/ | |/| | | ast: simplify to fully populate dynamic slicing case transformation | ||||
| * | | | ast: simplify to fully populate dynamic slicing case transformation | Eddie Hung | 2020-03-31 | 1 | -1/+1 |
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* | | | Merge pull request #1783 from boqwxp/astcc_cleanup | Eddie Hung | 2020-03-30 | 1 | -13/+20 |
|\ \ \ | |_|/ |/| | | Clean up pseudo-private member usage in `frontends/ast/ast.cc`. | ||||
| * | | Add explanatory comment about inefficient wire removal and remove ↵ | Alberto Gonzalez | 2020-03-30 | 1 | -4/+8 |
| | | | | | | | | | | | | | | | | | | superfluous call to `fixup_ports()`. Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| * | | Revert over-aggressive change to a more modest cleanup. | Alberto Gonzalez | 2020-03-27 | 1 | -2/+3 |
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| * | | Clean up pseudo-private member usage in `frontends/ast/ast.cc`. | Alberto Gonzalez | 2020-03-19 | 1 | -11/+13 |
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* | | | Merge pull request #1811 from PeterCrozier/typedef_scope | N. Engelhardt | 2020-03-30 | 4 | -41/+81 |
|\ \ \ | | | | | | | | | Support module/package/interface/block scope for typedef names. | ||||
| * | | | Inline productions to follow house style. | Peter Crozier | 2020-03-27 | 1 | -33/+29 |
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