Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Inline productions to follow house style. | Peter Crozier | 2020-03-27 | 1 | -33/+29 |
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* | Error duplicate declarations of a typedef name in the same scope. | Peter Crozier | 2020-03-24 | 2 | -3/+11 |
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* | Support module/package/interface/block scope for typedef names. | Peter Crozier | 2020-03-23 | 4 | -20/+56 |
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* | Simplify was not being called for packages. Broke typedef enums. | Peter Crozier | 2020-03-22 | 1 | -5/+8 |
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* | Build pkg_user_types before parsing in case of changes in the design. | Peter Crozier | 2020-03-22 | 1 | -6/+3 |
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* | Clear pkg_user_types if no packages following a 'design -reset-vlog'. | Peter | 2020-03-22 | 2 | -0/+5 |
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* | Parser changes to support typedef. | Peter | 2020-03-22 | 4 | -10/+88 |
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* | Merge pull request #1788 from YosysHQ/eddie/fix_ndebug | Eddie Hung | 2020-03-19 | 2 | -2/+2 |
|\ | | | | | Fix NDEBUG warnings | ||||
| * | Fix NDEBUG warnings | Eddie Hung | 2020-03-19 | 2 | -2/+2 |
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* | | Merge pull request #1787 from YosysHQ/mmicko/lexer_deps | Miodrag Milanović | 2020-03-19 | 1 | -1/+1 |
|\ \ | |/ |/| | Add dependency to verilog_lexer.cc | ||||
| * | Add one mode dependency | Miodrag Milanovic | 2020-03-19 | 1 | -1/+1 |
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* | | Merge pull request #1775 from huaixv/asserts_locations | N. Engelhardt | 2020-03-19 | 2 | -7/+31 |
|\ \ | |/ |/| | Add precise locations for asserts | ||||
| * | Add precise locations for asserts | huaixv | 2020-03-19 | 2 | -7/+31 |
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* | | Add AST node source location information in a couple more parser rules. | Alberto Gonzalez | 2020-03-17 | 1 | -0/+2 |
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* | Merge pull request #1759 from zeldin/constant_with_comment_redux | Miodrag Milanović | 2020-03-14 | 2 | -19/+43 |
|\ | | | | | refixed parsing of constant with comment between size and value | ||||
| * | refixed parsing of constant with comment between size and value | Marcus Comstedt | 2020-03-11 | 2 | -19/+43 |
| | | | | | | | | | | | | The three parts of a based constant (size, base, digits) are now three separate tokens, allowing the linear whitespace (including comments) between them to be treated as normal inter-token whitespace. | ||||
* | | Merge pull request #1754 from boqwxp/precise_locations | Miodrag Milanović | 2020-03-14 | 1 | -2/+53 |
|\ \ | | | | | | | Set AST node source location in more parser rules. | ||||
| * | | verilog: also set location for simple_behavioral_stmt | Eddie Hung | 2020-03-10 | 1 | -0/+4 |
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| * | | Set AST source locations in more parser rules. | Alberto Gonzalez | 2020-03-10 | 1 | -2/+49 |
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* / | Fix compilation for emcc | jiegec | 2020-03-11 | 1 | -1/+2 |
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* | Fix partsel expr bit width handling and add test case | Claire Wolf | 2020-03-08 | 1 | -4/+6 |
| | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | Fix bison warning for "pure-parser" option | Claire Wolf | 2020-03-03 | 1 | -1/+1 |
| | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | Merge pull request #1718 from boqwxp/precise_locations | Claire Wolf | 2020-03-03 | 8 | -299/+384 |
|\ | | | | | Closes #1717. Add more precise Verilog source location information to AST and RTLIL nodes. | ||||
| * | Closes #1717. Add more precise Verilog source location information to AST ↵ | Alberto Gonzalez | 2020-02-23 | 8 | -299/+384 |
| | | | | | | | | and RTLIL nodes. | ||||
* | | Merge pull request #1681 from YosysHQ/eddie/fix1663 | Claire Wolf | 2020-03-03 | 1 | -15/+13 |
|\ \ | | | | | | | verilog: instead of modifying localparam size, extend init constant expr | ||||
| * | | verilog: instead of modifying localparam size, extend init constant expr | Eddie Hung | 2020-02-05 | 1 | -15/+13 |
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* | | | Merge pull request #1724 from YosysHQ/eddie/abc9_specify | Eddie Hung | 2020-03-02 | 2 | -12/+20 |
|\ \ \ | | | | | | | | | abc9: auto-generate *.lut/*.box files and arrival/required times from specify entries | ||||
| * | | | ast: quiet down when deriving blackbox modules | Eddie Hung | 2020-02-27 | 2 | -12/+20 |
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* | | | ast: fixes #1710; do not generate RTLIL for unreachable ternary | Eddie Hung | 2020-02-27 | 1 | -9/+22 |
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* | | | Comment out log() | Eddie Hung | 2020-02-27 | 1 | -1/+1 |
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* | | Merge pull request #1703 from YosysHQ/eddie/specify_improve | Eddie Hung | 2020-02-21 | 3 | -36/+92 |
|\ \ | | | | | | | Improve specify parser | ||||
| * | | verilog: add support for more delays than just rise/fall | Eddie Hung | 2020-02-19 | 1 | -1/+40 |
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| * | | verilog: ignore ranges too without -specify | Eddie Hung | 2020-02-13 | 1 | -1/+2 |
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| * | | verilog: improve specify support when not in -specify mode | Eddie Hung | 2020-02-13 | 1 | -13/+7 |
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| * | | verilog: ignore '&&&' when not in -specify mode | Eddie Hung | 2020-02-13 | 2 | -5/+6 |
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| * | | specify: system timing checks to accept min:typ:max triple | Eddie Hung | 2020-02-13 | 1 | -12/+29 |
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| * | | verilog: fix $specify3 check | Eddie Hung | 2020-02-13 | 1 | -7/+11 |
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* | | | Merge pull request #1642 from jjj11x/jjj11x/sv-enum | Claire Wolf | 2020-02-20 | 5 | -18/+325 |
|\ \ \ | |/ / |/| | | Enum support | ||||
| * | | remove unnecessary blank line | Jeff Wang | 2020-02-17 | 1 | -2/+1 |
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| * | | add attributes for enumerated values in ilang | Jeff Wang | 2020-02-17 | 3 | -2/+76 |
| | | | | | | | | | | | | | | | | | | - information also useful for strongly-typed enums (not implemented) - resolves enum values in ilang part of #1594 - still need to output enums to VCD (or better yet FST) files | ||||
| * | | separate out enum_item/param implementation when they should be different | Jeff Wang | 2020-02-17 | 1 | -7/+16 |
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| * | | fix bug introduced by not taking all of PeterCrozier's changes in 16ea4ea6 | Jeff Wang | 2020-01-17 | 1 | -4/+6 |
| | | | | | | | | | | | | | | | | | | | | | | | | The if(str == node->str) is in fact necessary (otherwise causes generate for in Multiplier_2D in tests/simple/multiplier.v to fail with error message "Right hand side of 3rd expression of generate for-loop is not constant!"). Note: in PeterCrozier's implementation, the break only breaks out of the switch-case, not the outer for loop. | ||||
| * | | fix enum in generate blocks | Jeff Wang | 2020-01-16 | 1 | -0/+20 |
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| * | | allow enums to be declared at toplevel scope | Jeff Wang | 2020-01-16 | 1 | -0/+7 |
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| * | | lexer doesn't seem to return TOK_REG for logic anymore | Jeff Wang | 2020-01-16 | 1 | -3/+4 |
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| * | | allow enum typedefs | Jeff Wang | 2020-01-16 | 1 | -1/+6 |
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| * | | partial rebase of PeterCrozier's enum work onto current master | Jeff Wang | 2020-01-16 | 5 | -17/+207 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I tried to keep only the enum-related changes, and minimize the diff. (The original commit also had a lot of work done to get typedefs working, but yosys has diverged quite a bit since the 2018-03-09 commit, with a new typedef implementation.) I did not include the import related changes either. Original commit: "Initial implementation of enum, typedef, import. Still a WIP." https://github.com/PeterCrozier/yosys/commit/881833aa738e7404987646ea8076284e911fce3f | ||||
* | | | Merge pull request #1679 from thasti/delay-parsing | N. Engelhardt | 2020-02-13 | 1 | -2/+2 |
|\ \ \ | | | | | | | | | Fix crash on wire declaration with delay | ||||
| * | | | correct wire declaration grammar for #1614 | Stefan Biereigel | 2020-02-03 | 1 | -2/+2 |
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* | | | | Modified $readmem[hb] to use '\' or '/' according the OS | Rodrigo Alejandro Melo | 2020-02-06 | 1 | -1/+6 |
| | | | | | | | | | | | | | | | | Signed-off-by: Rodrigo Alejandro Melo <rmelo@inti.gob.ar> |