| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | | Support custom PROGRAM_PREFIX | Miodrag Milanovic | 2020-04-10 | 2 | -1/+11 | |
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| * | | Merge pull request #1562 from whitequark/write_cxxrtl | whitequark | 2020-04-10 | 2 | -0/+5 | |
| |\ \ | | | | | | | write_cxxrtl: new backend | |||||
| | * | | write_cxxrtl: new backend. | whitequark | 2020-04-09 | 2 | -0/+5 | |
| | | | | | | | | | | | | | | | | This commit adds a basic implementation that isn't very performant but implements most of the planned features. | |||||
| * | | | Merge pull request #1858 from YosysHQ/eddie/fix1856 | Eddie Hung | 2020-04-09 | 3 | -3/+3 | |
| |\ \ \ | | | | | | | | | kernel: include "kernel/constids.inc" | |||||
| | * | | | kernel: include "kernel/constids.inc" instead of "constids.inc" | Eddie Hung | 2020-04-09 | 3 | -3/+3 | |
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| * / / | [NFCI] Deduplicate builtin FF cell types list | Marcelina Kościelnicka | 2020-04-09 | 2 | -0/+49 | |
| |/ / | | | | | | | | | | | | | | | | | A few passes included the same list of FF cell types. Make it a global const instead. The zinit pass also seems to include a list like that, but given that it seems to be completely broken at the time (see #1568 discussion), I'm going to pretend I didn't see that. | |||||
| * | | kernel: big fat patch to use more ID::*, otherwise ID(*) | Eddie Hung | 2020-04-02 | 10 | -679/+822 | |
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| * | | kernel: IdString::in(const IdString &) as per @Tjoppen | Eddie Hung | 2020-04-02 | 1 | -1/+1 | |
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| * | | kernel: fix formatting (thanks @boqwxp) | Eddie Hung | 2020-04-02 | 1 | -6/+4 | |
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| * | | kernel: use C++11 fold hack to prevent recursion | Eddie Hung | 2020-04-02 | 1 | -3/+8 | |
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| * | | Revert "kernel: IdString:in() to use perfect forwarding" | Eddie Hung | 2020-04-02 | 1 | -2/+2 | |
| | | | | | | | | | This reverts commit 7b2a85aedf24affc2e1202c78e70e6a317f5bf29. | |||||
| * | | kernel: separate IdString::put_reference() out to help inlining | Eddie Hung | 2020-04-02 | 1 | -1/+4 | |
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| * | | kernel: IdString:in() to use perfect forwarding | Eddie Hung | 2020-04-02 | 1 | -2/+2 | |
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| * | | kernel: Use constids.inc for global/constant IdStrings | Eddie Hung | 2020-04-02 | 4 | -17/+37 | |
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| * | | Merge pull request #1845 from YosysHQ/eddie/kernel_speedup | Eddie Hung | 2020-04-02 | 4 | -505/+477 | |
| |\ \ | | | | | | | kernel: speedup by using more pass-by-const-ref | |||||
| | * | | kernel: pass-by-value into Design::scratchpad_set_string() too | Eddie Hung | 2020-03-27 | 2 | -3/+3 | |
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| | * | | kernel: const Wire* overload -> Wire* !!! | Eddie Hung | 2020-03-26 | 1 | -1/+1 | |
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| | * | | kernel: Cell::set{Port,Param}() to pass by value, but use std::move | Eddie Hung | 2020-03-26 | 2 | -7/+7 | |
| | | | | | | | | | | | | | Otherwise cell->setPort(ID::A, cell->getPort(ID::B)) could be invalid | |||||
| | * | | kernel: SigSpec copies to not trigger pack() | Eddie Hung | 2020-03-18 | 2 | -34/+5 | |
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| | * | | kernel: more pass by const ref, more speedups | Eddie Hung | 2020-03-18 | 3 | -361/+355 | |
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| | * | | kernel: speedup | Eddie Hung | 2020-03-18 | 1 | -30/+23 | |
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| | * | | kernel: use const reference for SigSet too | Eddie Hung | 2020-03-17 | 1 | -18/+18 | |
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| | * | | kernel: fix DeleteWireWorker | Eddie Hung | 2020-03-17 | 1 | -9/+4 | |
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| | * | | kernel: SigSpec use more const& + overloads to prevent implicit SigSpec | Eddie Hung | 2020-03-13 | 2 | -38/+52 | |
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| | * | | kernel: optimise Module::remove(const pool<RTLIL::Wire*>() | Eddie Hung | 2020-03-12 | 2 | -10/+9 | |
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| | * | | kernel: SigPool to use const& + overloads to prevent implicit SigSpec | Eddie Hung | 2020-03-12 | 1 | -19/+25 | |
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| * | | | Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup | Eddie Hung | 2020-04-01 | 1 | -10/+3 | |
| |\ \ \ | | | | | | | | | kernel: share a single CellTypes within a pass | |||||
| | * | | | kernel: share a single CellTypes within a pass | Eddie Hung | 2020-03-18 | 1 | -10/+3 | |
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| * | / | Clean up pseudo-private member usage in `kernel/yosys.cc`. | Alberto Gonzalez | 2020-04-01 | 1 | -14/+13 | |
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| * | | Add support for SystemVerilog-style `define to Verilog frontend | Rupert Swarbrick | 2020-03-27 | 2 | -1/+6 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch should support things like `define foo(a, b = 3, c) a+b+c `foo(1, ,2) which will evaluate to 1+3+2. It also spots mistakes like `foo(1) (the 3rd argument doesn't have a default value, so a call site is required to set it). Most of the patch is a simple parser for the format in preproc.cc, but I've also taken the opportunity to wrap up the "name -> definition" map in a type, rather than use multiple std::map's. Since this type needs to be visible to code that touches defines, I've pulled it (and the frontend_verilog_preproc declaration) out into a new file at frontends/verilog/preproc.h and included that where necessary. Finally, the patch adds a few tests in tests/various to check that we are parsing everything correctly. | |||||
| * | | Update Copyright | Claire Wolf | 2020-03-16 | 1 | -1/+1 | |
| | | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | |||||
| * | | License: bump year and add title | Waldir Pimenta | 2020-03-14 | 1 | -1/+1 | |
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| * | | exclude clang from checking | Miodrag Milanovic | 2020-03-13 | 1 | -1/+1 | |
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| * | | Add YS_ prefix to macros, add explanation and apply to older version as well | Miodrag Milanovic | 2020-03-13 | 3 | -20/+23 | |
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| * | | Use boost xpressive for gcc 4.8 | Miodrag Milanovic | 2020-03-13 | 3 | -23/+29 | |
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| * | Fix compilation for emcc | jiegec | 2020-03-11 | 2 | -1/+4 | |
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| * | Add ScriptPass::run_nocheck and use for abc9 | David Shah | 2020-03-09 | 2 | -0/+13 | |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | Merge pull request #1718 from boqwxp/precise_locations | Claire Wolf | 2020-03-03 | 1 | -2/+0 | |
| |\ | | | | | Closes #1717. Add more precise Verilog source location information to AST and RTLIL nodes. | |||||
| | * | Closes #1717. Add more precise Verilog source location information to AST ↵ | Alberto Gonzalez | 2020-02-23 | 1 | -2/+0 | |
| | | | | | | | | | and RTLIL nodes. | |||||
| * | | Small fixes | Eddie Hung | 2020-02-27 | 1 | -2/+2 | |
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| * | | Fixes for older compilers | Eddie Hung | 2020-02-27 | 1 | -1/+8 | |
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| * | | Make TimingInfo::TimingInfo(SigBit) constructor explicit | Eddie Hung | 2020-02-27 | 1 | -4/+5 | |
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| * | | TimingInfo: index by (port_name,offset) | Eddie Hung | 2020-02-27 | 1 | -9/+19 | |
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| * | | Fix spacing | Eddie Hung | 2020-02-27 | 1 | -50/+50 | |
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| * | | Get rid of (* abc9_{arrival,required} *) entirely | Eddie Hung | 2020-02-27 | 1 | -3/+4 | |
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| * | | abc9_ops: use TimingInfo for -prep_{lut,box} too | Eddie Hung | 2020-02-27 | 1 | -1/+4 | |
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| * | | abc9_ops: use TimingInfo for -prep_{lut,box} too | Eddie Hung | 2020-02-27 | 1 | -18/+2 | |
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| * | | abc9_ops: add and use new TimingInfo struct | Eddie Hung | 2020-02-27 | 1 | -0/+173 | |
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| * | | Merge pull request #1705 from YosysHQ/logger_pass | Miodrag Milanović | 2020-02-26 | 3 | -2/+100 | |
| |\ \ | |/ |/| | Logger pass | |||||
| | * | Remove duplicate warning detection | Miodrag Milanovic | 2020-02-23 | 1 | -0/+6 | |
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index : iCE40/yosys | |
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