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| * | | | | | | Wrapped functions that use unsigned int or type_t as typesBenedikt Tutzer2018-08-211-7/+127
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| * | | | | | | added operators <, == and !=Benedikt Tutzer2018-08-211-0/+45
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| * | | | | | | Added previousely missed functionsBenedikt Tutzer2018-08-211-1/+445
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| * | | | | | | Deleted duplicate DestructorBenedikt Tutzer2018-08-211-1/+0
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| * | | | | | | added some checks if python is enabled to make sure everything compiles if ↵Benedikt Tutzer2018-08-204-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | python is disabled in the makefile
| * | | | | | | The share directory cannot be searched when used as a Python library, only ↵Benedikt Tutzer2018-08-202-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in shell mode
| * | | | | | | Python passes are now looked for in share/plugins and can be added by ↵Benedikt Tutzer2018-08-201-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specifying a relative or absolute path
| * | | | | | | Fixed issue when using a python plugin in the yosys shellBenedikt Tutzer2018-08-203-4/+28
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| * | | | | | | Python Passes can now be added with the -m option or with the plugin ↵Benedikt Tutzer2018-08-163-1/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | command. There are still issues when run in shell mode, but they can be used just fine in a python script
| * | | | | | | Added Wrappers for:Benedikt Tutzer2018-08-133-142/+2923
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -IdString -Const -CaseRule -SwitchRule -SyncRule -Process -SigChunk -SigBit -SigSpec With all their member functions as well as the remaining member functions for Cell, Wire, Module and Design and static functions of rtlil.h
| * | | | | | | Saving id and pointer to c++ object. Object is valid only if both id and ↵Benedikt Tutzer2018-08-011-8/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pointer match the pair saved in the corresponding map in kernel/rtlil.cc. Otherwise, the object was destroyed in c++ and should not be accessed any more
| * | | | | | | Setup is called automatically when the module is loaded, shutdown when ↵Benedikt Tutzer2018-08-011-16/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | python exits
| * | | | | | | Cleaned up commentsBenedikt Tutzer2018-08-011-9/+3
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| * | | | | | | Added Monitor class that can monitor all changes in a Design or in a ModuleBenedikt Tutzer2018-07-101-0/+119
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| * | | | | | | added destructors for wires and cellsBenedikt Tutzer2018-07-102-1/+16
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| * | | | | | | removed debug outputBenedikt Tutzer2018-07-091-1/+0
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| * | | | | | | commands can now be run on arbitrary designs, not only on the active oneBenedikt Tutzer2018-07-091-0/+10
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| * | | | | | | multiple designs can now exist independent from each other. ↵Benedikt Tutzer2018-07-093-45/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cells/Wires/Modules can now move to a different parent without referencing issues
| * | | | | | | Introduced namespace and removed class-prefixes to increase readabilityBenedikt Tutzer2018-06-281-163/+165
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| * | | | | | | changed references from hash-ids to IdString namesBenedikt Tutzer2018-06-281-64/+32
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| * | | | | | | added wrappers for Design, Modules, Cells and WiresBenedikt Tutzer2018-06-251-0/+244
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* | | | | | | | Add "wbflip" commandClifford Wolf2019-04-202-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | Ignore 'whitebox' attr in flatten with "-wb" optionEddie Hung2019-04-181-2/+2
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* | | | | | | Add "whitebox" attribute, add "read_verilog -wb"Clifford Wolf2019-04-182-3/+7
| |_|_|_|_|/ |/| | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | Add "read_ilang -lib"Clifford Wolf2019-04-052-0/+25
| |/ / / / |/| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signalsClifford Wolf2019-03-232-1/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Add fmcombine passClifford Wolf2019-03-152-17/+32
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Add hashlib "<container>::element(int n)" methodsClifford Wolf2019-03-141-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Fix a bug in handling quotes in multi-cmd lines in Yosys scriptsClifford Wolf2019-03-121-1/+7
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Improve determinism of IdString DB for similar scriptsClifford Wolf2019-03-114-5/+67
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Add ENABLE_GLOB Makefile switchClifford Wolf2019-03-111-3/+5
| |_|_|/ |/| | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | Merge pull request #819 from YosysHQ/clifford/optdClifford Wolf2019-02-221-2/+16
|\ \ \ \ | |_|_|/ |/| | | Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behavior
| * | | Rename "yosys -U" to "yosys -P" to avoid confusion about "undefine"Clifford Wolf2019-02-211-3/+3
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behaviorClifford Wolf2019-02-211-2/+16
| | |/ | |/| | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* / | Add FF support to wreduceClifford Wolf2019-02-201-0/+3
|/ / | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Add optional nullstr argument to log_id()Clifford Wolf2019-01-151-1/+3
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Fix typographical and grammatical errors and inconsistencies.whitequark2019-01-022-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually.
* | proc_clean: remove any empty cases if all cases use all-def compare.whitequark2018-12-232-0/+14
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* | tcl: add support for passing arguments to scripts.whitequark2018-12-201-7/+18
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* | Improve ConstEval error handling for non-eval cell typesClifford Wolf2018-11-292-9/+19
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Avoid assert when label is an empty stringJon Burgess2018-10-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling back() on an empty string is not allowed and triggers an assert with recent gcc: $ cd manual/PRESENTATION_Intro $ ../../yosys counter.ys ... /usr/include/c++/8/bits/basic_string.h:1136: std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::reference std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::back() [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::reference = char&]: Assertion '!empty()' failed. 802 if (label.back() == ':' && GetSize(label) > 1) (gdb) p label $1 = ""
* | fix unhandled std::out_of_range when calling yosys with 3-character argumentwhentze2018-10-221-2/+2
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* | Documentation improvements etc.Ruben Undheim2018-10-131-3/+1
| | | | | | | | | | | | | | | | | | - Mention new feature in the SystemVerilog section in the README file - Commented changes much better - Rename a few signals to make it clearer - Prevent warning for unused signals in an easier way - Add myself as copyright holder to 2 files - Fix one potential memory leak (delete 'wire' if not in modport)
* | Support for 'modports' for System Verilog interfacesRuben Undheim2018-10-122-2/+2
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* | Synthesis support for SystemVerilog interfacesRuben Undheim2018-10-122-0/+17
| | | | | | | | This time doing the changes mostly in AST before RTLIL generation
* | Fix IdString M in setup_stdcells()Adrian Wheeldon2018-10-041-1/+1
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* | Fix Cygwin build and document needed packagesMiodrag Milanovic2018-09-191-1/+1
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* | Merge pull request #591 from hzeller/virtual-overrideClifford Wolf2018-08-158-32/+31
|\ \ | | | | | | Consistent use of 'override' for virtual methods in derived classes.
| * | Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-208-32/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* | | Map .eblif extension as blif.litghost2018-08-131-0/+2
|/ / | | | | | | Signed-off-by: litghost <537074+litghost@users.noreply.github.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-26 12:44:03 +0000