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| * Include module name for area summary statsEdmond Cote2018-06-181-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PR prints the name of the module when displaying the final area count. Pros: - Easier for the user to `grep` for area information about a specific module Cons: - Arguably more verbose, less "pretty" than author desires Verification: ~~~~ 30c30 < Chip area for this module: 20616.349000 --- > Chip area for module '$paramod$d1738fc0bb353d517bc2caf8fef2abb20bced034\picorv32': 20616.349000 70c70 < Chip area for this module: 88.697700 --- > Chip area for module '\picorv32_axi_adapter': 88.697700 102c102 < Chip area for this module: 20705.046700 --- > Chip area for top module '\picorv32_axi': 20705.046700 ~~~~
| * Add setundef -anyseq / -anyconst support to -undriven modeClifford Wolf2018-06-011-3/+11
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Add "setundef -anyconst"Clifford Wolf2018-06-011-20/+41
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Correction to -expose with setundefAman Goel2018-05-151-0/+1
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* | Minor correctionAman Goel2018-05-141-2/+1
| | | | | | | | Minor typo error correction in -expose with setundef
* | Corrections to option -expose in setundef passAman Goel2018-05-131-16/+141
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* | Add option -expose to setundef passAman Goel2018-05-131-6/+26
|/ | | | | | Option -expose converts undriven wires to inputs. Example usage: setundef -undriven -expose [selection]
* Some cleanups in setundef.ccClifford Wolf2018-05-131-0/+7
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "#ifdef __FreeBSD__"Christian Krämer2018-05-131-1/+1
| | | | (Re-commit e3575a8 with corrected author field)
* Revert "Add "#ifdef __FreeBSD__""Clifford Wolf2018-05-131-1/+1
| | | | This reverts commit e3575a86c525f2511902e7022893c3923ba8093e.
* Add "#ifdef __FreeBSD__"Johnny Sorocil2018-05-051-1/+1
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* Add "setundef -undef"Clifford Wolf2018-03-121-0/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix connwrappers help messageClifford Wolf2018-03-041-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Recognize stand-alone obj pattern even when it contains a slashClifford Wolf2018-02-131-0/+3
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* Add support for "yosys -E"Clifford Wolf2018-01-076-0/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for editline as replacement for readlineClifford Wolf2017-11-081-0/+4
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* Add "ltp" commandClifford Wolf2017-10-312-0/+186
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* Add blackbox commandClifford Wolf2017-10-042-0/+82
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* More intuitive handling of "cd .." for singleton modulesClifford Wolf2017-08-191-2/+38
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* Add $alu to list of supported cells for "stat -width"Clifford Wolf2017-07-141-1/+1
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* Add "design -import"Clifford Wolf2017-06-301-3/+94
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* Add chtype commandClifford Wolf2017-06-302-0/+84
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* Add "setundef -anyseq"Clifford Wolf2017-05-281-2/+42
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* Improve write_aiger handling of unconnected nets and constantsClifford Wolf2017-05-281-1/+1
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* Fix gcc compiler warningClifford Wolf2017-04-051-1/+1
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* Add "chformal -assert2assume" and friendsClifford Wolf2017-02-281-0/+44
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* Add "chformal" passClifford Wolf2017-02-272-0/+239
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* Added "check -initdrv"Clifford Wolf2017-01-041-3/+82
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* Added "design -reset-vlog"Clifford Wolf2016-11-301-7/+32
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* Added wire start_offset and upto handling to splitnets cmdClifford Wolf2016-11-231-2/+8
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* Bugfix in "setundef" passClifford Wolf2016-11-081-2/+7
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* Implemented "scc -set_attr"Clifford Wolf2016-11-061-22/+32
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* Bugfix in "scc" commandClifford Wolf2016-11-061-9/+11
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* Added "setparam -type"Clifford Wolf2016-10-191-3/+13
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* Added "tee +INT -INT"Clifford Wolf2016-09-061-0/+10
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* Improved "show" help messageClifford Wolf2016-08-281-3/+5
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* Minor fixes in show commandClifford Wolf2016-08-161-3/+3
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* Replaced "select -assert-limit" with -assert-max and -assert-minClifford Wolf2016-07-011-42/+29
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* Added 'assert-limit' option for 'select' commandeshellko2016-07-011-5/+42
| | | For resource limited designs such as FPGA it can be useful to specify limit of specific resources available on board. So user can check if he should change RTL as early as mapping done.
* Added "setundef -init"Clifford Wolf2016-06-031-5/+89
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* Fixed "scc" for cells that have feedback singals _and_ are part of a larger loopClifford Wolf2016-05-271-3/+3
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* Added "qwp -v"Clifford Wolf2016-04-281-0/+30
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* Added "yosys -D" featureClifford Wolf2016-04-2110-11/+11
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* Added support for installed pluginsClifford Wolf2016-03-301-2/+6
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* Support for abstract modules in chparamClifford Wolf2016-03-211-0/+6
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* Added "stat -liberty" for calculating chip areaClifford Wolf2016-02-041-6/+60
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* Fixed "splitnets -ports" for hierarchical designsClifford Wolf2015-12-221-0/+57
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* Added %R select expressionClifford Wolf2015-12-201-0/+50
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* Added torder commandClifford Wolf2015-11-192-0/+124
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* Import more std:: stuff into Yosys namespaceClifford Wolf2015-10-256-19/+19
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