iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Added "check -initdrv"	Clifford Wolf	2017-01-04	1	-3/+82
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*	Added "design -reset-vlog"	Clifford Wolf	2016-11-30	1	-7/+32
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*	Added wire start_offset and upto handling to splitnets cmd	Clifford Wolf	2016-11-23	1	-2/+8
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*	Bugfix in "setundef" pass	Clifford Wolf	2016-11-08	1	-2/+7
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*	Implemented "scc -set_attr"	Clifford Wolf	2016-11-06	1	-22/+32
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*	Bugfix in "scc" command	Clifford Wolf	2016-11-06	1	-9/+11
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*	Added "setparam -type"	Clifford Wolf	2016-10-19	1	-3/+13
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*	Added "tee +INT -INT"	Clifford Wolf	2016-09-06	1	-0/+10
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*	Improved "show" help message	Clifford Wolf	2016-08-28	1	-3/+5
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*	Minor fixes in show command	Clifford Wolf	2016-08-16	1	-3/+3
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*	Replaced "select -assert-limit" with -assert-max and -assert-min	Clifford Wolf	2016-07-01	1	-42/+29
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*	Added 'assert-limit' option for 'select' command	eshellko	2016-07-01	1	-5/+42
\| \| \|	For resource limited designs such as FPGA it can be useful to specify limit of specific resources available on board. So user can check if he should change RTL as early as mapping done.
*	Added "setundef -init"	Clifford Wolf	2016-06-03	1	-5/+89
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*	Fixed "scc" for cells that have feedback singals _and_ are part of a larger loop	Clifford Wolf	2016-05-27	1	-3/+3
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*	Added "qwp -v"	Clifford Wolf	2016-04-28	1	-0/+30
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*	Added "yosys -D" feature	Clifford Wolf	2016-04-21	10	-11/+11
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*	Added support for installed plugins	Clifford Wolf	2016-03-30	1	-2/+6
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*	Support for abstract modules in chparam	Clifford Wolf	2016-03-21	1	-0/+6
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*	Added "stat -liberty" for calculating chip area	Clifford Wolf	2016-02-04	1	-6/+60
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*	Fixed "splitnets -ports" for hierarchical designs	Clifford Wolf	2015-12-22	1	-0/+57
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*	Added %R select expression	Clifford Wolf	2015-12-20	1	-0/+50
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*	Added torder command	Clifford Wolf	2015-11-19	2	-0/+124
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*	Import more std:: stuff into Yosys namespace	Clifford Wolf	2015-10-25	6	-19/+19
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*	renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()	Clifford Wolf	2015-10-24	1	-1/+1
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*	improvement in "stat"	Clifford Wolf	2015-10-24	1	-1/+1
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*	Disabled "Skipping blackbox module" msg in show command	Clifford Wolf	2015-10-23	1	-1/+1
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*	Added edgetypes command	Clifford Wolf	2015-09-27	2	-0/+107
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*	Some cleanups in qwp	Clifford Wolf	2015-09-26	1	-7/+16
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*	Added pivoting to qwp solver	Clifford Wolf	2015-09-24	1	-14/+43
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*	Improved qwp performance	Clifford Wolf	2015-09-24	1	-49/+25
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*	Added statistics summary to "qwp"	Clifford Wolf	2015-09-24	1	-0/+77
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*	Bugfix in "qwp" pass	Clifford Wolf	2015-09-21	1	-6/+31
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*	Improvements and fixes in "qwp" pass	Clifford Wolf	2015-09-21	1	-29/+74
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*	Added "qwp -dump"	Clifford Wolf	2015-09-20	1	-21/+115
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*	Added "qwp" command	Clifford Wolf	2015-09-20	2	-0/+586
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*	Fixed port ordering in "splitnets" cmd	Clifford Wolf	2015-09-01	1	-7/+18
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*	Another block of spelling fixes	Larry Doolittle	2015-08-14	1	-3/+3
\| \| \| \|	Smaller this time
*	Re-created command-reference-manual.tex, copied some doc fixes to online help	Clifford Wolf	2015-08-14	2	-2/+2
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*	Spell check (by Larry Doolittle)	Clifford Wolf	2015-08-14	8	-16/+16
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*	Some ASCII encoding fixes (comments and docs) by Larry Doolittle	Clifford Wolf	2015-08-13	1	-1/+1
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*	Fixed "check" command for inout ports	Clifford Wolf	2015-07-27	1	-3/+11
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*	Some fixes in "select" command	Clifford Wolf	2015-07-16	1	-1/+3
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*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02	17	-56/+56
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*	Bugfix in chparam	Clifford Wolf	2015-06-30	1	-6/+5
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*	Added design->rename(module, new_name)	Clifford Wolf	2015-06-30	1	-3/+1
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*	Added "rename -top new_name"	Clifford Wolf	2015-06-17	1	-0/+27
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*	Fixed cstr_buf for std::string with small string optimization	Clifford Wolf	2015-06-11	1	-1/+1
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*	Preserve important attributes in splitnets	Clifford Wolf	2015-04-29	1	-0/+13
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*	Added "splice -wires"	Clifford Wolf	2015-04-13	1	-9/+20
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*	Added support for "file names with blanks"	Clifford Wolf	2015-04-08	1	-20/+14
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