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* | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-1920-263/+263
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| * | | | Merge pull request #1283 from YosysHQ/clifford/fix1255Clifford Wolf2019-08-171-1/+1
| |\ \ \ \ | | | | | | | | | | | | Fix various NDEBUG compiler warnings
| | * \ \ \ Merge branch 'master' into clifford/fix1255Clifford Wolf2019-08-151-2/+2
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| | * | | | | Fix various NDEBUG compiler warnings, closes #1255Clifford Wolf2019-08-131-1/+1
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| * | | | | Merge pull request #1300 from YosysHQ/eddie/cleanup2Clifford Wolf2019-08-1720-262/+262
| |\ \ \ \ \ | | |_|_|_|/ | |/| | | | Use ID::{A,B,Y,keep,blackbox,whitebox} instead of ID()
| | * | | | Use ID::keep more liberally tooEddie Hung2019-08-154-9/+9
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| | * | | | Use more ID::{A,B,Y,blackbox,whitebox}Eddie Hung2019-08-1520-253/+253
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* | | | | | Use attributes instead of paramsEddie Hung2019-08-191-11/+25
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* | | | | | Set abc_flop and use it in toposortEddie Hung2019-08-191-31/+51
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* | | | | | Merge branch 'eddie/abc9_refactor' into xaig_dffEddie Hung2019-08-1627-1267/+1501
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| * | | | | Use ID()Eddie Hung2019-08-161-3/+3
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| * | | | | Compute abc_scc_break and move CI/CO outside of each abc9Eddie Hung2019-08-161-43/+80
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| * | | | Merge pull request #1302 from mmicko/dfflibmap_regressionClifford Wolf2019-08-162-10/+10
| |\ \ \ \ | | | | | | | | | | | | DFFLIBMAP pass regression fix
| | * | | | Regression in abc9Miodrag Milanovic2019-08-161-1/+1
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| | * | | | Just needed IDs to be IdStringMiodrag Milanovic2019-08-161-9/+9
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| * / / / Add missing NMUX to "abc -g" handlingClifford Wolf2019-08-161-0/+1
| |/ / / | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | ID(\\.*) -> ID(.*)Eddie Hung2019-08-1525-766/+766
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| * | | Transform all "\\*" identifiers into ID()Eddie Hung2019-08-1525-782/+782
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| * | | Transform "$.*" to ID("$.*") in passes/techmapEddie Hung2019-08-1524-367/+362
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| * | | More use of IdString::in()Eddie Hung2019-08-153-10/+9
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| * | AND with an inverted input, causes X{,N}OR output to be inverted tooEddie Hung2019-08-141-2/+2
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| * | Revert "Only sort leaves on non-ANDNOT/ORNOT cells"Eddie Hung2019-08-141-7/+6
| | | | | | | | | | | | This reverts commit 5ec5f6dec7d4cdcfd9e1a2cda999886605778400.
| * | Only sort leaves on non-ANDNOT/ORNOT cellsEddie Hung2019-08-141-6/+7
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| * | Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves"Eddie Hung2019-08-141-4/+8
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| * | Since $_ANDNOT_ is not symmetric, do not sort leavesEddie Hung2019-08-121-8/+4
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| * Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-1011-67/+67
| |\ | | | | | | Cleanup a few barnacles across codebase
| | * substr() -> compare()Eddie Hung2019-08-075-28/+28
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| | * RTLIL::S{0,1} -> State::S{0,1}Eddie Hung2019-08-074-16/+16
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| | * Merge remote-tracking branch 'origin/master' into eddie/cleanupEddie Hung2019-08-071-22/+20
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| | * | stoi -> atoiEddie Hung2019-08-0711-39/+39
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| | * | Use std::stoi instead of atoi(<str>.c_str())Eddie Hung2019-08-069-32/+32
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| | * | Use State::S{0,1}Eddie Hung2019-08-061-1/+1
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| | * | Make liberal use of IdString.in()Eddie Hung2019-08-066-17/+17
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| * | | Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib, add "abc -g ↵Clifford Wolf2019-08-091-15/+54
| | | | | | | | | | | | | | | | | | | | | | | | all", fixes #1273 Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | Add commentEddie Hung2019-08-071-2/+3
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| * | | Revert "Add TODO"Eddie Hung2019-08-071-2/+0
| | | | | | | | | | | | | | | | This reverts commit 6068a6bf0d91e3ab9a5eaa33894a816f1560f99a.
| * | | Add TODOEddie Hung2019-08-071-0/+2
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| * | | Compute box_lookup just onceEddie Hung2019-08-071-8/+24
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| * | Redesign of cell cost APIClifford Wolf2019-08-071-22/+20
| |/ | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Add $_NMUX_, add "abc -g cmos", add proper cmos cell costsClifford Wolf2019-08-062-29/+63
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Merge pull request #1238 from mmicko/vsbuild_fixClifford Wolf2019-08-021-0/+1
| |\ | | | | | | Visual Studio build fix
| | * Visual Studio build fixMiodrag Milanovic2019-07-311-0/+1
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| * | Fix formatting for msys2 mingw build using GetSizeMiodrag Milanovic2019-08-011-5/+5
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| * Merge pull request #1188 from YosysHQ/eddie/abc9_push_invertersEddie Hung2019-07-161-44/+127
| |\ | | | | | | abc9: push inverters driving box inputs (comb outputs) through $lut soft logic
| | * Add commentEddie Hung2019-07-131-0/+5
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| | * duplicate -> cloneEddie Hung2019-07-121-3/+3
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| | * More cleanupEddie Hung2019-07-121-8/+2
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| | * CleanupEddie Hung2019-07-121-29/+51
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| | * CleanupEddie Hung2019-07-121-10/+4
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| | * CleanupEddie Hung2019-07-121-15/+24
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