| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | Move scc operations out of inner loop | Eddie Hung | 2020-01-02 | 1 | -8/+4 |
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| * | Cleanup | Eddie Hung | 2020-01-02 | 1 | -2/+1 |
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| * | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor | Eddie Hung | 2020-01-02 | 3 | -99/+55 |
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| | * | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2020-01-02 | 2 | -11/+18 |
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| | * | | Update doc | Eddie Hung | 2020-01-02 | 1 | -4/+4 |
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| | * | | abc9 -keepff -> -dff; refactor dff operations | Eddie Hung | 2020-01-02 | 1 | -19/+30 |
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| | * | | Cleanup abc9, update doc for -keepff option | Eddie Hung | 2020-01-01 | 1 | -6/+5 |
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| | * | | Restore abc9 -keepff | Eddie Hung | 2020-01-01 | 1 | -39/+40 |
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| | * | | attributes.count() -> get_bool_attribute() | Eddie Hung | 2020-01-01 | 1 | -2/+2 |
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| | * | | parse_xaiger to not take box_lookup | Eddie Hung | 2019-12-31 | 1 | -43/+4 |
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| | * | | Do not re-order carry chain ports, just precompute iteration order | Eddie Hung | 2019-12-31 | 1 | -22/+0 |
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| * | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor | Eddie Hung | 2020-01-02 | 2 | -11/+18 |
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| | * | | Merge pull request #1601 from YosysHQ/eddie/synth_retime | Eddie Hung | 2020-01-02 | 1 | -11/+15 |
| | |\ \ | | | | | | | | | "abc -dff" to no longer retime by default | ||||
| | | * | | Revert "ABC to call retime all the time" | Eddie Hung | 2019-12-30 | 1 | -11/+15 |
| | | | | | | | | | | | | | | | | | This reverts commit 9aa94370a54c016421740d2ce32ef0aa338d0dbd. | ||||
| | * | | | take skip wire bits into account | Miodrag Milanovic | 2020-01-01 | 1 | -0/+3 |
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| * | | | | Remove abc9 -clk option | Eddie Hung | 2019-12-30 | 1 | -1/+1 |
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| * | | | | abc9_ops -prep_dff cope with lack of holes module | Eddie Hung | 2019-12-30 | 1 | -38/+38 |
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| * | | | | Rename struct | Eddie Hung | 2019-12-30 | 1 | -3/+3 |
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| * | | | | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor | Eddie Hung | 2019-12-30 | 1 | -9/+0 |
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| | * | | | Remove delay targets doc | Eddie Hung | 2019-12-30 | 1 | -9/+0 |
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| * | | | | Move Pass::call() out of abc9_ops into abc9 | Eddie Hung | 2019-12-30 | 2 | -68/+59 |
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| * | | | | Use function arg | Eddie Hung | 2019-12-30 | 1 | -9/+9 |
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| * | | | | holes_module to be whitebox | Eddie Hung | 2019-12-30 | 1 | -0/+10 |
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| * | | | | Add abc9_ops -prep_holes | Eddie Hung | 2019-12-30 | 2 | -3/+313 |
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| * | | | | Add abc9_ops -prep_dff | Eddie Hung | 2019-12-30 | 3 | -39/+50 |
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| * | | | | Restore count_outputs, move process check to abc | Eddie Hung | 2019-12-30 | 2 | -11/+13 |
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| * | | | | Fix struct name | Eddie Hung | 2019-12-30 | 1 | -3/+3 |
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| * | | | | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor | Eddie Hung | 2019-12-30 | 2 | -323/+124 |
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| | * | | | write_xaiger to use scratchpad for stats; cleanup abc9 | Eddie Hung | 2019-12-30 | 1 | -173/+15 |
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| | * | | | Remove submod changes | Eddie Hung | 2019-12-30 | 1 | -99/+37 |
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| | * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-30 | 6 | -101/+1080 |
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| | * | | | Add "synth_xilinx -dff" option, cleanup abc9 | Eddie Hung | 2019-12-30 | 1 | -49/+19 |
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| | * | | | Grammar | Eddie Hung | 2019-12-30 | 1 | -1/+1 |
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| | * | | | Disable clock domain partitioning in Yosys pass, let ABC do it | Eddie Hung | 2019-12-23 | 1 | -6/+22 |
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| | * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-20 | 2 | -20/+19 |
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| | * | | | | Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_t | Eddie Hung | 2019-12-19 | 1 | -5/+5 |
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| | * | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-19 | 5 | -4/+245 |
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| | * | | | | | Remove &verify -s | Eddie Hung | 2019-12-17 | 1 | -1/+1 |
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| | * | | | | | Use pool<> instead of std::set<> to preserver ordering | Eddie Hung | 2019-12-17 | 1 | -6/+6 |
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| | * | | | | | Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flop | Eddie Hung | 2019-12-16 | 1 | -5/+27 |
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| | * | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-12 | 1 | -8/+67 |
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| | * \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-06 | 2 | -175/+137 |
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| | * | | | | | | | Call abc9 with "&write -n", and parse_xaiger() to cope | Eddie Hung | 2019-12-06 | 1 | -2/+2 |
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| | * | | | | | | | Fix abc9 re-integration, remove abc9_control_wire, use cell->type as | Eddie Hung | 2019-12-06 | 1 | -39/+15 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as part of clock domain for mergeability class | ||||
| | * | | | | | | | abc9 to do clock partitioning again | Eddie Hung | 2019-12-05 | 1 | -37/+144 |
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| | * | | | | | | | Remove clkpart | Eddie Hung | 2019-12-05 | 2 | -309/+0 |
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| | * | | | | | | | Add assertion | Eddie Hung | 2019-12-03 | 1 | -0/+1 |
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| | * | | | | | | | Add abc9_init wire, attach to abc9_flop cell | Eddie Hung | 2019-12-03 | 1 | -2/+12 |
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| | * | | | | | | | Cleanup | Eddie Hung | 2019-12-01 | 1 | -3/+2 |
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| | * | | | | | | | Use pool instead of std::set for determinism | Eddie Hung | 2019-12-01 | 1 | -1/+1 |
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index : iCE40/yosys | |
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