| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | Merge pull request #3264 from jix/invalid_ff_dcinit_merge | Jannis Harder | 2022-04-02 | 2 | -2/+21 | |
| |\ \ | | | | | | | opt_merge: Add `-keepdc` option required for formal verification | |||||
| | * | | opt_merge: Add `-keepdc` option required for formal verification | Jannis Harder | 2022-04-01 | 2 | -2/+21 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | The `-keepdc` option prevents merging flipflops with dont-care bits in their initial value, as, in general, this is not a valid transform for formal verification. The keepdc option of `opt` is passed along to `opt_merge` now. | |||||
| * | | | Set init values for wrapped async control signals | Miodrag Milanovic | 2022-04-01 | 1 | -0/+2 | |
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| * | | Support memories in aiw and multiclock | Miodrag Milanovic | 2022-03-31 | 1 | -16/+86 | |
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| * | | Merge pull request #3194 from Ravenslofty/abc9-flow3mfs | Lofty | 2022-03-28 | 1 | -1/+7 | |
| |\ \ | | | | | | | abc9: add flow3mfs script | |||||
| | * | | abc9: add flow3mfs script | Lofty | 2022-02-10 | 1 | -1/+7 | |
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| * | | abc9_ops: Also derive blackboxes with timing info | gatecat | 2022-03-24 | 1 | -5/+10 | |
| | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | Proper SigBit forming in sim | Miodrag Milanovic | 2022-03-22 | 1 | -4/+4 | |
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| * | | Proper SigBit forming in sim | Miodrag Milanovic | 2022-03-22 | 1 | -4/+4 | |
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| * | | More verbose warnings | Miodrag Milanovic | 2022-03-18 | 1 | -5/+7 | |
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| * | | Recognize registers and set initial state for them in tb | Miodrag Milanovic | 2022-03-16 | 1 | -6/+32 | |
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| * | | Update sim help message. | Miodrag Milanovic | 2022-03-16 | 1 | -1/+2 | |
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| * | | Merge pull request #3232 from YosysHQ/micko/fst2tb | Miodrag Milanović | 2022-03-14 | 1 | -0/+319 | |
| |\ \ | | | | | | | Added fst2tb pass for generating testbench | |||||
| | * | | Added fst2tb pass for generating testbench | Miodrag Milanovic | 2022-03-14 | 1 | -0/+319 | |
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| * | | | Merge pull request #3213 from antonblanchard/abc-typo | Claire Xen | 2022-03-14 | 1 | -2/+2 | |
| |\ \ \ | |/ / |/| | | abc: Fix {I} and {P} substitution | |||||
| | * | | abc: Fix {I} and {P} substitution | Anton Blanchard | 2022-02-23 | 1 | -2/+2 | |
| | | | | | | | | | | | | | We were searching for {D} after the first match of {I} or {P}. | |||||
| * | | | Merge pull request #3229 from YosysHQ/micko/sim_date | Miodrag Milanović | 2022-03-11 | 1 | -7/+20 | |
| |\ \ \ | | | | | | | | | Add date parameter to enable full date/time and version info | |||||
| | * | | | Add date parameter to enable full date/time and version info | Miodrag Milanovic | 2022-03-11 | 1 | -7/+20 | |
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| * | | | | Add "sim -q" option | Claire Xenia Wolf | 2022-03-11 | 1 | -8/+19 | |
| |/ / / | | | | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net> | |||||
| * | | | Small fix in "sim" help message | Claire Xenia Wolf | 2022-03-11 | 1 | -1/+1 | |
| | | | | | | | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net> | |||||
| * | | | FstData already do conversion to VCD | Miodrag Milanovic | 2022-03-11 | 1 | -1/+2 | |
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| * | | | Support cell name in btor witness file | Miodrag Milanovic | 2022-03-11 | 1 | -5/+14 | |
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| * | | | Proper write of memory data | Miodrag Milanovic | 2022-03-11 | 1 | -14/+13 | |
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| * | | | Start work on memory init | Miodrag Milanovic | 2022-03-09 | 1 | -9/+34 | |
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| * | | | Fixes and error check | Miodrag Milanovic | 2022-03-09 | 1 | -1/+5 | |
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| * | | | cleanup | Miodrag Milanovic | 2022-03-07 | 1 | -1/+2 | |
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| * | | | Error checks for aiger witness | Miodrag Milanovic | 2022-03-07 | 1 | -0/+7 | |
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| * | | | btor2 witness co-simulation | Miodrag Milanovic | 2022-03-07 | 1 | -8/+123 | |
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| * | | | Merge pull request #3219 from YosysHQ/micko/quick_vcd | Miodrag Milanović | 2022-03-04 | 1 | -0/+1 | |
| |\ \ \ | | | | | | | | | VCD reader support by using external tool | |||||
| | * | | | VCD reader support by using external tool | Miodrag Milanovic | 2022-02-28 | 1 | -0/+1 | |
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| * | | | | Add option to ignore X only signals in output | Miodrag Milanovic | 2022-03-02 | 1 | -8/+32 | |
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| * | | | | Write simulation files after simulation is performed | Miodrag Milanovic | 2022-03-02 | 1 | -145/+151 | |
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| * | | | | Cleanup | Miodrag Milanovic | 2022-03-02 | 1 | -10/+7 | |
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| * | | | | Refactor sim output writers | Miodrag Milanovic | 2022-02-28 | 1 | -213/+257 | |
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| * | | | | Quick fix | Miodrag Milanovic | 2022-02-28 | 1 | -0/+2 | |
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| * | | | | Add writing of aiw files to "sim" command | Claire Xenia Wolf | 2022-02-28 | 1 | -1/+87 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net> | |||||
| * | | | | Hotfix in AIGER witness reader state machine | Claire Xenia Wolf | 2022-02-28 | 1 | -0/+1 | |
| |/ / / | | | | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net> | |||||
| * | | | Support extended aiw format | Miodrag Milanovic | 2022-02-27 | 1 | -23/+44 | |
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| * | | | Fix for last clock edge data | Miodrag Milanovic | 2022-02-25 | 1 | -3/+1 | |
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| * | | | Experimental sim changes | Claire Xenia Wolf | 2022-02-25 | 1 | -20/+22 | |
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| * | | Merge pull request #3211 from YosysHQ/micko/witness | Claire Xen | 2022-02-22 | 1 | -1/+96 | |
| |\ \ | | | | | | | Add support for AIGER witness files in "sim" command | |||||
| | * | | Fix cycle 0 in aiger witness co-simulation | Claire Xenia Wolf | 2022-02-18 | 1 | -12/+15 | |
| | | | | | | | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net> | |||||
| | * | | Added AIGER witness file co simulation | Miodrag Milanovic | 2022-02-18 | 1 | -1/+93 | |
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| * | | | Fix handling of ce_over_srst | Miodrag Milanovic | 2022-02-21 | 1 | -3/+2 | |
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| * | | simplify logic of handling flip-flops and latches | Miodrag Milanovic | 2022-02-18 | 1 | -118/+42 | |
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| * | | Review cleanup | Miodrag Milanovic | 2022-02-17 | 1 | -6/+5 | |
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| * | | Add support for various ff/latch cells simulation | Miodrag Milanovic | 2022-02-16 | 1 | -60/+204 | |
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| * | | Merge branch 'master' into clk2ff-better-names | Claire Xen | 2022-02-11 | 171 | -3928/+6702 | |
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| | * \ | Merge pull request #2019 from boqwxp/glift | Claire Xen | 2022-02-11 | 2 | -0/+600 | |
| | |\ \ | | | | | | | | | Add `glift` command for creating gate-level information flow tracking models and optimization problems | |||||
| | | * | | glift: Use ID() rather than string literals. | Alberto Gonzalez | 2020-07-01 | 1 | -11/+11 | |
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