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| * | | | | | | | | | | | Fix alignmentEddie Hung2019-06-211-1/+1
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| * | | | | | | | | | | | Add FIXME about need for -mux4Eddie Hung2019-06-211-0/+2
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| * | | | | | | | | | | | Since muxcover uses MUX4s, blast them back to gates hereEddie Hung2019-06-211-0/+7
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| * | | | | | | | | | | | Expand synth -coarse without wreduce, move muxcoverEddie Hung2019-06-211-12/+24
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| * | | | | | | | | | | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abcEddie Hung2019-06-201-0/+1
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| * | | | | | | | | | | | mux_map to drop sign bit, and eliminate 'bx-esEddie Hung2019-06-201-13/+47
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| * | | | | | | | | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-181-29/+27
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| * \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-181-31/+33
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-171-9/+8
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-172-33/+59
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-171-5/+5
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| * | | | | | | | | | | | | | | | | Try -W 300Eddie Hung2019-06-161-1/+2
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| * | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-151-2/+2
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| * | | | | | | | | | | | | | | | | | Revert "Remove wide mux inference"Eddie Hung2019-06-144-3/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 738fdfe8f55e18ac7f315cd68c117eae370004ca.
* | | | | | | | | | | | | | | | | | | Capture all data in one "abc_flop" attributeEddie Hung2019-07-011-1/+1
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* | | | | | | | | | | | | | | | | | | Update abc_box_id numberingEddie Hung2019-07-012-5/+5
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* | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-07-0112-98/+228
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| * | | | | | | | | | | | | | | | | | install *_nowide.lut filesEddie Hung2019-06-291-0/+2
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| * | | | | | | | | | | | | | | | | Remove peepopt call in synth_xilinx since already in synth -run coarseEddie Hung2019-06-281-5/+0
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| * | | | | | | | | | | | | | | | Reduce diff with upstreamEddie Hung2019-06-271-4/+2
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| * | | | | | | | | | | | | | | | Refactor for one "abc_carry" attribute on moduleEddie Hung2019-06-271-2/+2
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| * | | | | | | | | | | | | | | | Remove redundant docEddie Hung2019-06-271-3/+0
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| * | | | | | | | | | | | | | | Add warning if synth_xilinx -abc9 with family != xc7Eddie Hung2019-06-271-0/+2
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| * | | | | | | | | | | | | | | Merge origin/masterEddie Hung2019-06-272-8/+9
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| * | | | | | | | | | | | | | Update comment on boxesEddie Hung2019-06-261-2/+3
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| * | | | | | | | | | | | | | Add "WE" to dist RAM's abc_scc_breakEddie Hung2019-06-261-3/+3
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| * | | | | | | | | | | | | Remove unused varEddie Hung2019-06-261-1/+1
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| * | | | | | | | | | | | Add _nowide variants of LUT libraries in -nowidelut flowsEddie Hung2019-06-262-12/+28
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| * | | | | | | | | | | | Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-261-2/+20
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| | * \ \ \ \ \ \ \ \ \ \ \ Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into ↵Eddie Hung2019-06-261-4/+24
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| | | * | | | | | | | | | | synth_xilinx: Add -nocarry and -nomux options.Marcin Kościelnicki2019-04-301-7/+26
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| * | | | | | | | | | | | | Realistic delays for RAM32X1D tooEddie Hung2019-06-251-2/+2
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| * | | | | | | | | | | | | Add RAM32X1D box infoEddie Hung2019-06-252-4/+12
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| * | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-255-8/+72
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| | * | | | | | | | | | | Add RAM32X1D supportEddie Hung2019-06-245-20/+73
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| * | | | | | | | | | | | Use LUT delays for dist RAM delaysEddie Hung2019-06-241-4/+4
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| * | | | | | | | | | | Add Xilinx dist RAM as comb boxesEddie Hung2019-06-242-0/+16
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| * | | | | | | | | | Add comment to xc7 boxEddie Hung2019-06-221-0/+3
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| * | | | | | | | | | Carry in/out box ordering now move to end, not swap with endEddie Hung2019-06-221-12/+12
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| * | | | | | | | | | Remove DFF and RAMD box info for nowEddie Hung2019-06-212-36/+0
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| * | | | | | | | | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abcEddie Hung2019-06-201-0/+1
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| * | | | | | | | | Really permute Xilinx LUT mappings as default LUT6.I5:A6Eddie Hung2019-06-181-16/+16
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| * | | | | | | | | Revert "Fix (do not) permute LUT inputs, but permute mux selects"Eddie Hung2019-06-181-33/+31
| | |_|_|_|_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit da3d2eedd2b6391621e81b3eaaa28a571e058f9d.
| * | | | | | | | Fix (do not) permute LUT inputs, but permute mux selectsEddie Hung2019-06-181-31/+33
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| * | | | | | | Fix copy-pasta issueEddie Hung2019-06-171-9/+8
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| * | | | | | Permute INIT for +/xilinx/lut_map.vEddie Hung2019-06-171-32/+58
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| * | | | | | Simplify commentEddie Hung2019-06-171-1/+1
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* | | | | | Merge branch 'xaig' into xaig_dffEddie Hung2019-06-171-5/+5
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| * | | | | Update LUT7/8 delays to take account for [ABC]OUTMUX delayEddie Hung2019-06-171-5/+5
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* | | | | | Add box delays for FD*Eddie Hung2019-06-171-10/+10
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