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* | | | | | Merge remote-tracking branch 'origin/xaig' into xaig_dffEddie Hung2019-06-171-1/+2
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| * | | | | Try -W 300Eddie Hung2019-06-171-1/+2
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* | | | | CleanupEddie Hung2019-06-163-11/+11
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* | | | | Add +/xilinx/abc_ffEddie Hung2019-06-151-0/+33
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* | | | | Fix spacingEddie Hung2019-06-151-1/+1
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* | | | | Use $__ABC_FF_ instead of $_FF_Eddie Hung2019-06-151-2/+10
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* | | | | Re-order alphabeticallyEddie Hung2019-06-151-1/+1
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* | | | | Fix initialisation of flopsEddie Hung2019-06-152-12/+12
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* | | | | Map to $_FF_ instead of $_DFF_P_ to prevent recursion issuesEddie Hung2019-06-152-2/+2
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* | | | | Wrap FDRE with $__ABC_FDRE containing combEddie Hung2019-06-154-12/+29
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* | | / Fix upper XC7 LUT[78] delays to use I[01] -> O delay not S -> OEddie Hung2019-06-151-2/+2
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* | | As per @daveshah1 remove async DFF timing from xilinxEddie Hung2019-06-141-2/+2
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* | | Add XC7_WIRE_DELAY macro to synth_xilinx.ccEddie Hung2019-06-141-1/+3
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* | | Update delays based on SymbiFlow/prjxray-dbEddie Hung2019-06-141-12/+13
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* | | Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut}Eddie Hung2019-06-144-3/+3
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* | | Remove WIP ABC9 flop supportEddie Hung2019-06-142-18/+18
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* | | Make doc consistentEddie Hung2019-06-141-1/+1
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* | | Fix name clashEddie Hung2019-06-131-4/+8
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* | | Move neg-pol to pos-pol mapping from ff_map to cells_map.vEddie Hung2019-06-121-0/+8
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* | | Reduce diff with masterEddie Hung2019-06-121-1/+1
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* | | Fix spacingEddie Hung2019-06-121-6/+6
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* | | Remove wide mux inferenceEddie Hung2019-06-124-194/+3
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* | | Retry "Add "-W' wire delay arg to abc9, use from synth_xilinx"Eddie Hung2019-06-121-1/+1
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* | | Revert "Add "-W' wire delay arg to abc9, use from synth_xilinx"Eddie Hung2019-06-121-1/+1
| | | | | | | | | | | | This reverts commit 2dffa4685b830313204f5d04314a14ed6ecac8ec.
* | | Add "-W' wire delay arg to abc9, use from synth_xilinxEddie Hung2019-06-111-1/+1
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* | | Disable dist RAM boxes due to comb loopEddie Hung2019-06-111-2/+2
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* | | Remove #ifndef ABCEddie Hung2019-06-111-4/+0
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* | | Revert "Revert "Move ff_map back after ABC for shregmap""Eddie Hung2019-06-101-5/+5
| | | | | | | | | | | | This reverts commit e473e7456545d702c011ee7872956f94a8522865.
* | | Revert "Rename shregmap -tech xilinx -> xilinx_dynamic"Eddie Hung2019-06-101-2/+2
| | | | | | | | | | | | This reverts commit 94a5f4e60985fc1e3fea75eec85638fa29874bea.
* | | Comment out muxpack (currently broken)Eddie Hung2019-06-071-2/+2
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* | | $__XILINX_MUX_ -> $__XILINX_SHIFTXEddie Hung2019-06-062-11/+11
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* | | Fix muxcover and its techmappingEddie Hung2019-06-062-3/+3
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* | | Run muxpack and muxcover in synth_xilinxEddie Hung2019-06-062-1/+18
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* | | Remove abc_flop attributes for nowEddie Hung2019-06-061-56/+10
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* | | Update abc attributes on FD*E_1Eddie Hung2019-06-051-6/+26
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* | | CleanupEddie Hung2019-06-052-17/+0
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* | | Call shregmap -tech xilinx_staticEddie Hung2019-06-051-1/+1
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* | | Revert "Move ff_map back after ABC for shregmap"Eddie Hung2019-06-051-4/+4
| | | | | | | | | | | | This reverts commit 9b9bd4e19f3da363eb3c90ef27ace282716d2e06.
* | | Rename shregmap -tech xilinx -> xilinx_dynamicEddie Hung2019-06-041-2/+2
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* | | Add space between -D and _ABCEddie Hung2019-06-041-2/+2
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* | | Add (* abc_flop_q *) to brams_bb.vEddie Hung2019-06-041-8/+8
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* | | Fix name clashEddie Hung2019-06-041-11/+11
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* | | Add mux_map.v for wide muxEddie Hung2019-06-044-30/+82
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* | | Move ff_map back after ABC for shregmapEddie Hung2019-06-031-4/+4
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* | | Respect -nocarryEddie Hung2019-06-031-1/+3
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* | | Fix pmux2shiftx logicEddie Hung2019-06-031-1/+1
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* | | Merge mistakeEddie Hung2019-06-031-14/+6
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* | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-031-1/+5
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| * | Remove extra newlineEddie Hung2019-06-031-1/+0
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| * | Execute techmap and arith_map simultaneouslyEddie Hung2019-06-031-6/+6
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