| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | | | | synth_xilinx to now wreduce except $mux, remove extra peepopt | Eddie Hung | 2019-06-21 | 1 | -8/+1 | |
| | | | | | ||||||
| * | | | | mux_map to no longer copy last value into 1'bx | Eddie Hung | 2019-06-21 | 1 | -19/+2 | |
| | | | | | ||||||
| * | | | | Fix spacing | Eddie Hung | 2019-06-21 | 1 | -3/+3 | |
| | | | | | ||||||
| * | | | | Fix spacing again, A_forward -> A_backward | Eddie Hung | 2019-06-21 | 1 | -38/+40 | |
| | | | | | ||||||
| * | | | | Restore wreduce to synth_xilinx, after muxcover | Eddie Hung | 2019-06-21 | 1 | -0/+1 | |
| | | | | | ||||||
| * | | | | Revert B_SIGNED optimisation, since only works for Y_WIDTH==1 | Eddie Hung | 2019-06-21 | 1 | -4/+3 | |
| | | | | | ||||||
| * | | | | Fix spacing | Eddie Hung | 2019-06-21 | 1 | -15/+15 | |
| | | | | | ||||||
| * | | | | synth_xilinx to use _ABC macro, and perform muxpack again | Eddie Hung | 2019-06-21 | 1 | -5/+5 | |
| | | | | | ||||||
| * | | | | Add $__XILINX_MUXF78 to preserve entire box | Eddie Hung | 2019-06-21 | 3 | -7/+28 | |
| | | | | | ||||||
| * | | | | Fix alignment | Eddie Hung | 2019-06-21 | 1 | -1/+1 | |
| | | | | | ||||||
| * | | | | Add FIXME about need for -mux4 | Eddie Hung | 2019-06-21 | 1 | -0/+2 | |
| | | | | | ||||||
| * | | | | Since muxcover uses MUX4s, blast them back to gates here | Eddie Hung | 2019-06-21 | 1 | -0/+7 | |
| | | | | | ||||||
| * | | | | Expand synth -coarse without wreduce, move muxcover | Eddie Hung | 2019-06-21 | 1 | -12/+24 | |
| | | | | | ||||||
| * | | | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc | Eddie Hung | 2019-06-20 | 1 | -0/+1 | |
| | | | | | ||||||
| * | | | | mux_map to drop sign bit, and eliminate 'bx-es | Eddie Hung | 2019-06-20 | 1 | -13/+47 | |
| | | | | | ||||||
| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-18 | 1 | -29/+27 | |
| |\| | | | ||||||
| | * | | | Really permute Xilinx LUT mappings as default LUT6.I5:A6 | Eddie Hung | 2019-06-18 | 1 | -16/+16 | |
| | | | | | ||||||
| | * | | | Revert "Fix (do not) permute LUT inputs, but permute mux selects" | Eddie Hung | 2019-06-18 | 1 | -33/+31 | |
| | | | | | | | | | | | | | | | | | This reverts commit da3d2eedd2b6391621e81b3eaaa28a571e058f9d. | |||||
| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-18 | 1 | -31/+33 | |
| |\| | | | ||||||
| | * | | | Fix (do not) permute LUT inputs, but permute mux selects | Eddie Hung | 2019-06-18 | 1 | -31/+33 | |
| | | | | | ||||||
| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-17 | 1 | -9/+8 | |
| |\| | | | ||||||
| | * | | | Fix copy-pasta issue | Eddie Hung | 2019-06-17 | 1 | -9/+8 | |
| | | | | | ||||||
| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-17 | 2 | -33/+59 | |
| |\| | | | ||||||
| | * | | | Permute INIT for +/xilinx/lut_map.v | Eddie Hung | 2019-06-17 | 1 | -32/+58 | |
| | | | | | ||||||
| | * | | | Simplify comment | Eddie Hung | 2019-06-17 | 1 | -1/+1 | |
| | | | | | ||||||
| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-17 | 1 | -5/+5 | |
| |\| | | | ||||||
| | * | | | Update LUT7/8 delays to take account for [ABC]OUTMUX delay | Eddie Hung | 2019-06-17 | 1 | -5/+5 | |
| | | | | | ||||||
| | * | | | Try -W 300 | Eddie Hung | 2019-06-17 | 1 | -1/+2 | |
| | | | | | ||||||
| * | | | | Try -W 300 | Eddie Hung | 2019-06-16 | 1 | -1/+2 | |
| | | | | | ||||||
| * | | | | Merge remote-tracking branch 'origin/xaig' into xc7mux | Eddie Hung | 2019-06-15 | 1 | -2/+2 | |
| |\| | | | ||||||
| | * | | | Fix upper XC7 LUT[78] delays to use I[01] -> O delay not S -> O | Eddie Hung | 2019-06-15 | 1 | -2/+2 | |
| | | | | | ||||||
| * | | | | Revert "Remove wide mux inference" | Eddie Hung | 2019-06-14 | 4 | -3/+194 | |
| |/ / / | | | | | | | | | | This reverts commit 738fdfe8f55e18ac7f315cd68c117eae370004ca. | |||||
| * | | | As per @daveshah1 remove async DFF timing from xilinx | Eddie Hung | 2019-06-14 | 1 | -2/+2 | |
| | | | | ||||||
| * | | | Add XC7_WIRE_DELAY macro to synth_xilinx.cc | Eddie Hung | 2019-06-14 | 1 | -1/+3 | |
| | | | | ||||||
| * | | | Update delays based on SymbiFlow/prjxray-db | Eddie Hung | 2019-06-14 | 1 | -12/+13 | |
| | | | | ||||||
| * | | | Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut} | Eddie Hung | 2019-06-14 | 4 | -3/+3 | |
| | | | | ||||||
| * | | | Remove WIP ABC9 flop support | Eddie Hung | 2019-06-14 | 2 | -18/+18 | |
| | | | | ||||||
| * | | | Make doc consistent | Eddie Hung | 2019-06-14 | 1 | -1/+1 | |
| | | | | ||||||
| * | | | Fix name clash | Eddie Hung | 2019-06-13 | 1 | -4/+8 | |
| | | | | ||||||
| * | | | Move neg-pol to pos-pol mapping from ff_map to cells_map.v | Eddie Hung | 2019-06-12 | 1 | -0/+8 | |
| | | | | ||||||
| * | | | Reduce diff with master | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
| | | | | ||||||
| * | | | Fix spacing | Eddie Hung | 2019-06-12 | 1 | -6/+6 | |
| | | | | ||||||
| * | | | Remove wide mux inference | Eddie Hung | 2019-06-12 | 4 | -194/+3 | |
| | | | | ||||||
| * | | | Retry "Add "-W' wire delay arg to abc9, use from synth_xilinx" | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
| | | | | ||||||
| * | | | Revert "Add "-W' wire delay arg to abc9, use from synth_xilinx" | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
| | | | | | | | | | | | | | This reverts commit 2dffa4685b830313204f5d04314a14ed6ecac8ec. | |||||
| * | | | Add "-W' wire delay arg to abc9, use from synth_xilinx | Eddie Hung | 2019-06-11 | 1 | -1/+1 | |
| | | | | ||||||
| * | | | Disable dist RAM boxes due to comb loop | Eddie Hung | 2019-06-11 | 1 | -2/+2 | |
| | | | | ||||||
| * | | | Remove #ifndef ABC | Eddie Hung | 2019-06-11 | 1 | -4/+0 | |
| | | | | ||||||
| * | | | Revert "Revert "Move ff_map back after ABC for shregmap"" | Eddie Hung | 2019-06-10 | 1 | -5/+5 | |
| | | | | | | | | | | | | | This reverts commit e473e7456545d702c011ee7872956f94a8522865. | |||||
| * | | | Revert "Rename shregmap -tech xilinx -> xilinx_dynamic" | Eddie Hung | 2019-06-10 | 1 | -2/+2 | |
| | | | | | | | | | | | | | This reverts commit 94a5f4e60985fc1e3fea75eec85638fa29874bea. | |||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |