| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | | | | | | Wrap SRL{16,32} too | Eddie Hung | 2019-08-20 | 3 | -7/+98 | |
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| * | | | | | | | Wrap LUTRAMs in order to capture comb/seq behaviour | Eddie Hung | 2019-08-20 | 5 | -36/+200 | |
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| * | | | | | | | Add LUTRAM delays | Eddie Hung | 2019-08-20 | 1 | -3/+6 | |
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| * | | | | | | | Remove mapping rules | Eddie Hung | 2019-08-20 | 1 | -33/+0 | |
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| * | | | | | | | Remove -icells | Eddie Hung | 2019-08-20 | 1 | -2/+2 | |
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| * | | | | | | | Use abc_{map,unmap,model}.v | Eddie Hung | 2019-08-20 | 7 | -110/+324 | |
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| * | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-08-20 | 1 | -2/+2 | |
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| | * | | | | | | Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro | Eddie Hung | 2019-08-19 | 1 | -2/+2 | |
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| * | | | | | | | Add arrival times for SRL outputs | Eddie Hung | 2019-08-19 | 1 | -3/+5 | |
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| * | | | | | | | Add BRAM arrival times | Eddie Hung | 2019-08-19 | 1 | -8/+10 | |
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| * | | | | | | | Add reference to source of Tclktoq timing | Eddie Hung | 2019-08-19 | 1 | -0/+2 | |
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| * | | | | | | | Add 'abc_arrival' attribute for flop outputs | Eddie Hung | 2019-08-19 | 1 | -6/+6 | |
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| * | | | | | | | Update box timings | Eddie Hung | 2019-08-19 | 1 | -6/+9 | |
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| * | | | | | | | Move from cell attr to module attr | Eddie Hung | 2019-08-19 | 1 | -12/+6 | |
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| * | | | | | | | Use attributes instead of params | Eddie Hung | 2019-08-19 | 1 | -30/+12 | |
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| * | | | | | | | Merge branch 'eddie/abc9_refactor' into xaig_dff | Eddie Hung | 2019-08-16 | 12 | -25/+627 | |
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| | * | | | | | | Attach abc_scc_break, abc_carry_{in,out} attr to ports not modules | Eddie Hung | 2019-08-16 | 1 | -8/+20 | |
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| | * | | | | | stoi -> atoi | Eddie Hung | 2019-08-07 | 1 | -1/+1 | |
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| | * | | | | RST -> RSTBRST for RAMB8BWER | Eddie Hung | 2019-07-29 | 1 | -3/+3 | |
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| | * | | | | xilinx: Fix missing cell name underscore in cells_map.v | David Shah | 2019-07-25 | 1 | -2/+2 | |
| | |/ / / | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | Merge pull request #1182 from koriakin/xc6s-bram | Eddie Hung | 2019-07-11 | 9 | -8/+598 | |
| | |\ \ \ | | | | | | | | | | | synth_xilinx: Initial Spartan 6 block RAM inference support. | |||||
| | | * | | | synth_xilinx: Initial Spartan 6 block RAM inference support. | Marcin Kościelnicki | 2019-07-11 | 9 | -8/+598 | |
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| | * / | | xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ↵ | Marcin Kościelnicki | 2019-07-11 | 2 | -6/+6 | |
| | |/ / | | | | | | | | | | ISE/Vivado. | |||||
| * | | | Add Tsu offset to boxes, and comments | Eddie Hung | 2019-07-11 | 1 | -6/+11 | |
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| * | | | ABC doesn't like negative delays in flop boxes... | Eddie Hung | 2019-07-11 | 1 | -6/+6 | |
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| * | | | Fix FDCE_1 box | Eddie Hung | 2019-07-11 | 1 | -1/+1 | |
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| * | | | Revert "$pastQ should be first input" | Eddie Hung | 2019-07-11 | 1 | -13/+13 | |
| | | | | | | | | | | | | | This reverts commit 8f9d529929f43e6ba98f06159ae9533984c6264f. | |||||
| * | | | Propagate INIT attr | Eddie Hung | 2019-07-11 | 1 | -5/+5 | |
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| * | | | $pastQ should be first input | Eddie Hung | 2019-07-11 | 1 | -13/+13 | |
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| * | | | Fix typo | Eddie Hung | 2019-07-11 | 1 | -1/+1 | |
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| * | | | Simplify to $__ABC_ASYNC box | Eddie Hung | 2019-07-11 | 2 | -19/+8 | |
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| * | | | $__ABC_FD_ASYNC_MUX.Q -> Y | Eddie Hung | 2019-07-11 | 1 | -1/+1 | |
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| * | | | Restore from master | Eddie Hung | 2019-07-10 | 1 | -0/+1 | |
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| * | | | Another typo | Eddie Hung | 2019-07-10 | 1 | -1/+1 | |
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| * | | | Fix clk_pol for FD*_1 | Eddie Hung | 2019-07-10 | 1 | -3/+3 | |
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| * | | | Another typo | Eddie Hung | 2019-07-10 | 1 | -1/+1 | |
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| * | | | Another typo | Eddie Hung | 2019-07-10 | 1 | -1/+1 | |
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| * | | | Use \$currQ | Eddie Hung | 2019-07-10 | 1 | -4/+9 | |
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| * | | | Preserve all parameters, plus some extra ones for clk/en polarity | Eddie Hung | 2019-07-10 | 1 | -10/+66 | |
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| * | | | Change how to specify flops to ABC again | Eddie Hung | 2019-07-10 | 1 | -13/+37 | |
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| * | | | Remove params from FD*_1 variants | Eddie Hung | 2019-07-10 | 1 | -12/+3 | |
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| * | | | Fix typo, and have !{PRE,CLR} behave as CE | Eddie Hung | 2019-07-10 | 1 | -14/+14 | |
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| * | | | Move ABC FF stuff to abc_ff.v; add support for other FD* types | Eddie Hung | 2019-07-10 | 4 | -27/+135 | |
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| * | | | Uncomment IS_C_INVERTED parameter | Eddie Hung | 2019-07-10 | 1 | -1/+1 | |
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| * | | | synth_xilinx's map_cells stage to techmap ff_map.v | Eddie Hung | 2019-07-10 | 1 | -0/+2 | |
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| * | | | Fix box numbering | Eddie Hung | 2019-07-10 | 2 | -5/+5 | |
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| * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-07-10 | 6 | -75/+446 | |
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| | * | | Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime | Eddie Hung | 2019-07-10 | 1 | -5/+8 | |
| | |\ \ | | | | | | | | | Error out if -abc9 and -retime specified | |||||
| | | * | | Error out if -abc9 and -retime specified | Eddie Hung | 2019-07-10 | 1 | -5/+8 | |
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| | * | | | Add some spacing | Eddie Hung | 2019-07-10 | 1 | -9/+9 | |
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index : iCE40/yosys | |
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