| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | * | | | | | | | | | | | | | | | | | | Use single DSP_SIGNEDONLY macro | Eddie Hung | 2019-07-18 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Working for unsigned | Eddie Hung | 2019-07-18 | 1 | -52/+28 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Cleanup | Eddie Hung | 2019-07-18 | 1 | -70/+58 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp | Eddie Hung | 2019-07-18 | 1 | -31/+41 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | | | | | | | | | | | | mul2dsp: Lower partial products always have unsigned inputs | David Shah | 2019-07-18 | 1 | -31/+41 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | Make all operands signed | Eddie Hung | 2019-07-17 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | Update comment | Eddie Hung | 2019-07-17 | 1 | -5/+3 | |
| | |/ / / / / / / / / / / / / / / / / / | ||||||
| | * | | | | | | | | | | | | | | | | | | Fix mul2dsp signedness | Eddie Hung | 2019-07-17 | 1 | -42/+38 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | A_SIGNED == B_SIGNED so flip both | Eddie Hung | 2019-07-17 | 1 | -21/+12 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Add DSP_{A,B}_SIGNEDONLY macro | Eddie Hung | 2019-07-16 | 1 | -11/+40 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Signedness | Eddie Hung | 2019-07-16 | 2 | -8/+8 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Revert drop down to 24x16 multipliers for all | Eddie Hung | 2019-07-16 | 2 | -4/+4 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp | Eddie Hung | 2019-07-16 | 4 | -27/+35 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | | | | | | | | | | | | xilinx: Add correct signed behaviour to DSP48E1 model | David Shah | 2019-07-16 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | | * | | | | | | | | | | | | | | | | | | xilinx: Treat DSP48E1 as 24x17 unsigned for now (actual behaviour is 25x18 ↵ | David Shah | 2019-07-16 | 2 | -4/+8 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | signed) Signed-off-by: David Shah <dave@ds0.me> | |||||
| | | * | | | | | | | | | | | | | | | | | | mul2dsp: Fix edge case where Y_WIDTH is less than B_WIDTH+`DSP_A_MAXWIDTH | David Shah | 2019-07-16 | 1 | -18/+22 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | | * | | | | | | | | | | | | | | | | | | mul2dsp: Fix indentation | David Shah | 2019-07-16 | 1 | -7/+7 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | Add support for {A,B,P}REG in DSP48E1 | Eddie Hung | 2019-07-16 | 1 | -5/+21 | |
| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | Do not swap if equals | Eddie Hung | 2019-07-15 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | Oops forgot these files | Eddie Hung | 2019-07-15 | 2 | -0/+5 | |
| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | OUT port to Y in generic DSP | Eddie Hung | 2019-07-15 | 2 | -3/+3 | |
| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | Move DSP mapping back out to dsp_map.v | Eddie Hung | 2019-07-15 | 2 | -41/+40 | |
| | |/ / / / / / / / / / / / / / / / / / | ||||||
| | * | | | | | | | | | | | | | | | | | | Only swap if B_WIDTH > A_WIDTH | Eddie Hung | 2019-07-15 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Tidy up | Eddie Hung | 2019-07-15 | 1 | -39/+26 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Move DSP48E1 model out of cells_xtra, initial multiply one in cells_sim | Eddie Hung | 2019-07-15 | 2 | -82/+131 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-07-15 | 12 | -25/+609 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | * | | | | | | | | | | | | | | | | | | | Move dsp_map.v into cells_map.v; cleanup synth_xilinx a little | Eddie Hung | 2019-07-10 | 4 | -45/+42 | |
| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-07-10 | 5 | -102/+193 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | * | | | | | | | | | | | | | | | | | | | | xc7: Map combinational DSP48E1s | David Shah | 2019-07-08 | 4 | -7/+77 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | mul2dsp: Fix typo | David Shah | 2019-07-08 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | | | | | | | Add mul2dsp multiplier splitting rule and ECP5 mapping | David Shah | 2019-07-08 | 5 | -2/+280 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | | | | | | | | | | | | | | | | | | | | | Fix box name | Eddie Hung | 2019-09-27 | 1 | -1/+1 | |
| | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | | | | | Missing an '&' | Eddie Hung | 2019-09-26 | 1 | -1/+1 | |
| | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ / / |/| | | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | | | | Use extractinv for synth_xilinx -ise | Marcin Kościelnicki | 2019-09-19 | 8 | -90/+502 | |
| | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ / / |/| | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | | | Merge pull request #1379 from mmicko/sim_models | Eddie Hung | 2019-09-18 | 2 | -7/+162 | |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added simulation models for Efinix and Anlogic | |||||
| | * | | | | | | | | | | | | | | | | | | make note that it is for latch mode | Miodrag Milanovic | 2019-09-18 | 1 | -0/+1 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | better lut handling | Miodrag Milanovic | 2019-09-18 | 1 | -4/+14 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | better handling of lut and begin/end add | Miodrag Milanovic | 2019-09-18 | 1 | -4/+10 | |
| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | Added simulation models for Efinix and Anlogic | Miodrag Milanovic | 2019-09-15 | 2 | -3/+141 | |
| | | |_|_|_|_|_|_|_|_|_|_|_|_|_|/ / / | |/| | | | | | | | | | | | | | | | | ||||||
| * / | | | | | | | | | | | | | | | | | xilinx: Make blackbox library family-dependent. | Marcin Kościelnicki | 2019-09-15 | 7 | -1024/+19252 | |
| |/ / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes #1246. | |||||
| * | | | | | | | | | | | | | / / / | synth_xilinx: Support init values on Spartan 6 flip-flops properly. | Marcin Kościelnicki | 2019-09-07 | 5 | -53/+219 | |
| | |_|_|_|_|_|_|_|_|_|_|_|_|/ / / |/| | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | Resolve TODO with pin assignments for SRL* | Eddie Hung | 2019-09-04 | 1 | -4/+2 | |
| | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | Add comments | Eddie Hung | 2019-09-02 | 1 | -1/+9 | |
| | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | Rename box | Eddie Hung | 2019-09-02 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-09-02 | 2 | -7/+8 | |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|_|_|_|/ / / | |/| | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | Fix TRELLIS_FF simulation model | Miodrag Milanovic | 2019-08-31 | 1 | -6/+7 | |
| | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | ecp5_gsr: Fix typo | David Shah | 2019-08-31 | 1 | -1/+1 | |
| | | |_|_|_|_|_|_|_|_|_|_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| | * | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl | Eddie Hung | 2019-08-30 | 13 | -136/+180 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| * | | | | | | | | | | | | | | | | Remove trailing space | Eddie Hung | 2019-08-30 | 1 | -2/+2 | |
| | | | | | | | | | | | | | | | | | ||||||
| * | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-30 | 10 | -109/+150 | |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | ||||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |