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* | | | Add RAM32X1D box infoEddie Hung2019-06-242-4/+12
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* | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-243-1/+17
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| * | | Re-enable dist RAM boxes for ECP5Eddie Hung2019-06-241-1/+1
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| * | | Revert "Re-enable dist RAM boxes for ECP5"Eddie Hung2019-06-241-1/+1
| | | | | | | | | | | | | | | | This reverts commit ca0225fcfaa8c9c68647034351a1569464959edf.
| * | | Re-enable dist RAM boxes for ECP5Eddie Hung2019-06-241-1/+1
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| * | | Add Xilinx dist RAM as comb boxesEddie Hung2019-06-242-0/+16
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* | | | Merge remote-tracking branch 'origin/eddie/ram32x1d' into xc7muxEddie Hung2019-06-245-8/+72
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| * | | Add RAM32X1D supportEddie Hung2019-06-245-20/+73
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* | | | Reduce MuxFx resources in mux techmappingEddie Hung2019-06-241-10/+30
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* | | | Reduce number of decomposed muxes during techmapEddie Hung2019-06-241-14/+11
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* | | | Revert "Fix techmapping muxes some more"Eddie Hung2019-06-241-4/+4
| | | | | | | | | | | | | | | | This reverts commit 0aae3b4f4361db6d2c6b9c8d69df041f40519cec.
* | | | Move commentEddie Hung2019-06-241-3/+3
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* | | | Fix techmapping muxes some moreEddie Hung2019-06-241-4/+4
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* | | | Fix mux techmappingEddie Hung2019-06-241-19/+20
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* | | | Modify costs for muxcoverEddie Hung2019-06-241-1/+15
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* | | | Change synth_xilinx's -nomux to -minmuxf <int>Eddie Hung2019-06-243-54/+82
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* | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-227-361/+46
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| * | | Add comments to ecp5 boxEddie Hung2019-06-221-0/+6
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| * | | Add comment to xc7 boxEddie Hung2019-06-221-0/+3
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| * | | Fix and cleanup ice40 boxes for carry in/outEddie Hung2019-06-224-313/+25
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| * | | Carry in/out box ordering now move to end, not swap with endEddie Hung2019-06-221-12/+12
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| * | | Remove DFF and RAMD box info for nowEddie Hung2019-06-212-36/+0
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* | | | Remove $_MUX4_ techmap ruleEddie Hung2019-06-211-11/+0
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* | | | Fix wreduce call (!!!), tweak muxcover costsEddie Hung2019-06-211-5/+6
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* | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-211-4/+5
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| * | | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-211-4/+5
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| | * | ecp5: Improve mapping of $alu when BI is usedDavid Shah2019-06-211-4/+5
| | | | | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * | | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-201-1/+1
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| * | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abcEddie Hung2019-06-201-0/+1
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* | | | Constrain wreduce only if wide muxEddie Hung2019-06-211-1/+4
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* | | | Simplify and comment out mux_map.vEddie Hung2019-06-211-6/+11
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* | | | synth_xilinx to now wreduce except $mux, remove extra peepoptEddie Hung2019-06-211-8/+1
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* | | | mux_map to no longer copy last value into 1'bxEddie Hung2019-06-211-19/+2
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* | | | Fix spacingEddie Hung2019-06-211-3/+3
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* | | | Fix spacing again, A_forward -> A_backwardEddie Hung2019-06-211-38/+40
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* | | | Restore wreduce to synth_xilinx, after muxcoverEddie Hung2019-06-211-0/+1
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* | | | Revert B_SIGNED optimisation, since only works for Y_WIDTH==1Eddie Hung2019-06-211-4/+3
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* | | | Fix spacingEddie Hung2019-06-211-15/+15
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* | | | synth_xilinx to use _ABC macro, and perform muxpack againEddie Hung2019-06-211-5/+5
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* | | | Add $__XILINX_MUXF78 to preserve entire boxEddie Hung2019-06-213-7/+28
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* | | | Fix alignmentEddie Hung2019-06-211-1/+1
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* | | | Add FIXME about need for -mux4Eddie Hung2019-06-211-0/+2
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* | | | Since muxcover uses MUX4s, blast them back to gates hereEddie Hung2019-06-211-0/+7
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* | | | Expand synth -coarse without wreduce, move muxcoverEddie Hung2019-06-211-12/+24
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* | | | Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abcEddie Hung2019-06-201-0/+1
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* | | | mux_map to drop sign bit, and eliminate 'bx-esEddie Hung2019-06-201-13/+47
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* | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-201-1/+1
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| * | | Fixed small typo in ice40_unlut help summaryacw12512019-06-191-1/+1
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| * | | Fixed the help summary line for a few commandsacw12512019-06-191-1/+1
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* | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-181-29/+27
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