| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | | * | | | Addressed review comments | Miodrag Milanovic | 2019-12-21 | 1 | -1/+0 | |
| | | * | | | Fix xilinx tests, when iopads are default | Miodrag Milanovic | 2019-12-21 | 17 | -42/+44 | |
| | * | | | | Add #1598 testcase | Eddie Hung | 2019-12-27 | 1 | -0/+16 | |
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| | * | | | Add DSP cascade tests | Eddie Hung | 2019-12-23 | 1 | -0/+89 | |
| | * | | | xilinx_dsp: Initial DSP48A/DSP48A1 support. | Marcin Kościelnicki | 2019-12-22 | 3 | -0/+29 | |
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| * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-19 | 11 | -30/+560 | |
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| | * | | tests/xilinx: fix flaky mux test | Marcin Kościelnicki | 2019-12-18 | 1 | -2/+4 | |
| | * | | xilinx: Add xilinx_dffopt pass (#1557) | Marcin Kościelnicki | 2019-12-18 | 3 | -3/+232 | |
| | * | | xilinx: Improve flip-flop handling. | Marcin Kościelnicki | 2019-12-18 | 3 | -11/+12 | |
| | * | | Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram | Eddie Hung | 2019-12-16 | 3 | -17/+171 | |
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| | | * | | Disable RAM16X1D test | Eddie Hung | 2019-12-13 | 1 | -17/+17 | |
| | | * | | Remove extraneous synth_xilinx call | Eddie Hung | 2019-12-12 | 1 | -2/+0 | |
| | | * | | Add tests for these new models | Eddie Hung | 2019-12-12 | 1 | -0/+40 | |
| | | * | | Add #1460 testcase | Eddie Hung | 2019-12-12 | 1 | -0/+34 | |
| | | * | | Rename memory tests to lutram, add more xilinx tests | Eddie Hung | 2019-12-12 | 2 | -17/+99 | |
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| | * | | Add another test | Eddie Hung | 2019-12-16 | 1 | -1/+8 | |
| | * | | Accidentally commented out tests | Eddie Hung | 2019-12-16 | 1 | -47/+47 | |
| | * | | Add unconditional match blocks for force RAM | Eddie Hung | 2019-12-16 | 1 | -0/+9 | |
| | * | | Merge blockram tests | Eddie Hung | 2019-12-16 | 2 | -47/+81 | |
| | * | | Fixing compiler warning/issues. Moving test script to the correct place | Diego H | 2019-12-16 | 1 | -0/+47 | |
| | * | | Renaming BRAM memory tests for the sake of uniformity | Diego H | 2019-12-13 | 1 | -6/+6 | |
| | * | | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test. | Diego H | 2019-12-12 | 1 | -2/+2 | |
| | * | | Adding a note (TODO) in the memory_params.ys check file | Diego H | 2019-12-12 | 1 | -0/+2 | |
| | * | | Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1 | Diego H | 2019-12-12 | 1 | -0/+45 | |
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| * | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-06 | 1 | -1/+1 | |
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| | * | tests: arch: xilinx: Change order of arguments in macc.sh | Jan Kowalewski | 2019-12-06 | 1 | -1/+1 | |
| * | | abc9_map.v to transform INIT=1 to INIT=0 | Eddie Hung | 2019-12-04 | 1 | -0/+91 | |
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| * | No need for -abc9 | Eddie Hung | 2019-11-26 | 1 | -1/+1 | |
| * | Add citation | Eddie Hung | 2019-11-26 | 1 | -0/+1 | |
| * | Add testcase derived from fastfir_dynamictaps benchmark | Eddie Hung | 2019-11-26 | 1 | -0/+68 | |
| * | xilinx: Use INV instead of LUT1 when applicable | Marcin Kościelnicki | 2019-11-25 | 4 | -8/+8 | |
| * | Fixed tests | Miodrag Milanovic | 2019-11-11 | 1 | -1/+5 | |
| * | Common memory test now shared | Miodrag Milanovic | 2019-10-18 | 2 | -22/+1 | |
| * | Share common tests | Miodrag Milanovic | 2019-10-18 | 22 | -300/+11 | |
| * | fix yosys path | Miodrag Milanovic | 2019-10-18 | 1 | -2/+2 | |
| * | Fix path to yosys | Miodrag Milanovic | 2019-10-18 | 1 | -1/+1 | |
| * | Moved all tests in arch sub directory | Miodrag Milanovic | 2019-10-18 | 36 | -0/+1034 | |
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index : iCE40/yosys | |
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