aboutsummaryrefslogtreecommitdiffstats
path: root/tests
Commit message (Collapse)AuthorAgeFilesLines
...
| | * | | Hide tri-state warning message for nowEddie Hung2019-08-222-1/+2
| | | | |
| | * | | Remove unused outputEddie Hung2019-08-221-1/+1
| | | | |
| | * | | Fix tribuf testEddie Hung2019-08-221-1/+1
| | | | |
| | * | | Fix commentsEddie Hung2019-08-228-10/+11
| | | | |
| | * | | Remove tech independent synthesisEddie Hung2019-08-229-16/+20
| | | | |
| | * | | Remove dffe instantationEddie Hung2019-08-221-7/+0
| | | | |
| | * | | Move $dffe to dffs.{v,ys}Eddie Hung2019-08-224-18/+41
| | | | |
| | * | | Make multiplier wider, do not do tech independent synthEddie Hung2019-08-222-8/+6
| | | | |
| | * | | Fix all comments from PRSergeyDegtyar2019-08-2120-160/+465
| | | | |
| | * | | Add temp directorySergeyDegtyar2019-08-211-0/+1
| | | | |
| | * | | Fix tests; Remove simulation;SergeyDegtyar2019-08-2026-519/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add -map and -assert options for equiv_opt; !!! '-assert' option was commented for the next tests (unproven $equiv cells was found): - dffs; - div_mod; - latches; - mul_pow; - Add design -load; - Remove simulations;
| | * | | Add new tests for ice40 architectureSergeyDegtyar2019-08-2027-0/+900
| | | | |
| * | | | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-302-0/+46
| |\ \ \ \ | | | |_|/ | | |/| |
| | * | | Add run-test.sh tooEddie Hung2019-08-281-0/+20
| | | | |
| | * | | Add SB_CARRY to ice40_opt testEddie Hung2019-08-281-3/+5
| | | | |
| | * | | Add ice40_opt testEddie Hung2019-08-281-0/+24
| | | |/ | | |/|
| * | | Add .gitignoreEddie Hung2019-08-281-0/+3
| | | |
| * | | Use test_pmgen for xilinx_srlEddie Hung2019-08-281-0/+57
| | | |
| * | | Do not simplemap for variable testEddie Hung2019-08-281-2/+2
| | | |
| * | | Add xilinx_srl testEddie Hung2019-08-283-0/+127
| | | |
| * | | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-284-8/+121
| |\| |
| * | | Revert "In sat: 'x' in init attr should not override constant"Eddie Hung2019-08-262-5/+1
| | | | | | | | | | | | | | | | This reverts commit 2b37a093e95036b267481b2dae2046278eef4040.
| * | | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-231-0/+1
| |\ \ \
| * | | | In sat: 'x' in init attr should not override constantEddie Hung2019-08-222-1/+5
| | | | |
| * | | | Remove Xilinx testEddie Hung2019-08-221-34/+0
| | | | |
| * | | | Add shregmap -tech xilinx testEddie Hung2019-08-221-0/+1
| | | | |
* | | | | Add constant expression attribute to testEddie Hung2019-08-291-0/+1
| | | | |
* | | | | Add failing testEddie Hung2019-08-281-0/+18
| |_|/ / |/| | |
* | | | Merge pull request #1325 from YosysHQ/eddie/sat_initClifford Wolf2019-08-281-1/+7
|\ \ \ \ | | | | | | | | | | In sat: 'x' in init attr should be ignored
| * | | | Revert to using cleanEddie Hung2019-08-271-1/+1
| | | | |
| * | | | Wire with init on FF part, 1'bx on non-FF partEddie Hung2019-08-241-1/+3
| | | | |
| * | | | Blocking assignmentEddie Hung2019-08-231-1/+1
| | | | |
| * | | | In sat: 'x' in init attr should not override constantEddie Hung2019-08-222-1/+5
| |/ / /
* | | | improve clkbuf_inhibit propagation upwards through hierarchyMarcin Koƛcielnicki2019-08-271-5/+33
| | | |
* | | | Improve tests to check that clkbuf is connected to expectedEddie Hung2019-08-261-6/+21
| | | |
* | | | Check clkbuf_inhibit=1 is ignored for custom selectionEddie Hung2019-08-231-0/+1
| | | |
* | | | Add simple clkbufmap testsEddie Hung2019-08-231-0/+52
| | | |
* | | | tests/techmap/run-test.sh to cope with *.ysEddie Hung2019-08-232-7/+18
| |/ / |/| |
* | | Do not propagate mem2reg attribute through to resultEddie Hung2019-08-221-0/+1
|/ /
* | Merge pull request #1317 from YosysHQ/eddie/opt_expr_shiftxEddie Hung2019-08-221-0/+70
|\ \ | | | | | | opt_expr to trim A port of $shiftx/$shift
| * | Respect opt_expr -keepdc as per @cliffordwolfEddie Hung2019-08-221-0/+14
| | |
| * | Handle $shift and Y_WIDTH > 1 as per @cliffordwolfEddie Hung2019-08-221-1/+43
| | |
| * | Add testEddie Hung2019-08-211-0/+14
| | |
* | | mem2reg to preserve user attributes and srcEddie Hung2019-08-211-0/+13
|/ /
* | Add testEddie Hung2019-08-203-0/+15
| |
* | Merge branch 'master' into clifford/pmgenClifford Wolf2019-08-206-1/+46
|\ \
| * | Add test case for real parametersClifford Wolf2019-08-201-1/+10
| |/ | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * proc_clean: fix order of switch insertion.whitequark2019-08-194-0/+35
| | | | | | | | Fixes #1268.
| * Add *.sv to tests/simple_abc9/.gitignoreClifford Wolf2019-08-191-0/+1
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgenClifford Wolf2019-08-1939-68/+534
|\|