| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| | | * | | | Add additional test cases for for-loops | Clifford Wolf | 2019-05-01 | 1 | -0/+25 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | Merge pull request #871 from YosysHQ/verific_import | Clifford Wolf | 2019-05-06 | 1 | -0/+52 | |
| | |\ \ \ \ | | |_|/ / | |/| | | | Improve verific -chparam and add hierarchy -chparam | |||||
| | | * | | | Add tests/various/chparam.sh | Clifford Wolf | 2019-05-06 | 1 | -0/+52 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | iverilog with simcells.v as well | Eddie Hung | 2019-05-03 | 1 | -1/+2 | |
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| | * | | | | Merge pull request #969 from YosysHQ/clifford/pmgenstuff | Clifford Wolf | 2019-05-03 | 1 | -0/+9 | |
| | |\ \ \ \ | | |/ / / | |/| | | | Improve pmgen, Add "peepopt" pass with shift-mul pattern | |||||
| | * | | | | Merge pull request #976 from YosysHQ/clifford/fix974 | Clifford Wolf | 2019-05-03 | 1 | -0/+22 | |
| | |\ \ \ \ | | | | | | | | | | | | | Fix width detection of memory access with bit slice | |||||
| | | * | | | | Add splitcmplxassign test case and silence splitcmplxassign warning | Clifford Wolf | 2019-05-01 | 1 | -0/+22 | |
| | | | |/ / | | |/| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | Fix typo in tests/svinterfaces/runone.sh | Clifford Wolf | 2019-05-03 | 1 | -2/+2 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | fail svinterfaces testcases on yosys error exit | Jakob Wenzel | 2019-05-02 | 1 | -2/+2 | |
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| * | | | | Merge remote-tracking branch 'origin/clifford/pmgenstuff' into xc7mux | Eddie Hung | 2019-05-02 | 1 | -0/+9 | |
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| | * | | | Add peepopt_muldiv, fixes #930 | Clifford Wolf | 2019-04-30 | 1 | -0/+9 | |
| | | |/ | |/| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-05-02 | 2 | -0/+23 | |
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| | * | | Fix #938 - Crash occurs in case when use write_firrtl command | Jim Lawson | 2019-05-01 | 2 | -0/+23 | |
| | |/ | | | | | | | | | | | Add missing memory initialization. Sanity-check memory parameters. Add Cell pointer to memory object (for error reporting). | |||||
| * | | Remove split_shiftx tests | Eddie Hung | 2019-04-26 | 2 | -139/+0 | |
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| * | | Merge remote-tracking branch 'origin/eddie/split_shiftx' into xc7mux | Eddie Hung | 2019-04-25 | 2 | -0/+139 | |
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| | * | | Add test | Eddie Hung | 2019-04-25 | 2 | -0/+139 | |
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| * | | Remove topo sort no-loop assertion, with test | Eddie Hung | 2019-04-24 | 3 | -1/+76 | |
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| * | | Fix abc9 with (* keep *) wires | Eddie Hung | 2019-04-23 | 1 | -0/+38 | |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-22 | 4 | -0/+110 | |
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| | * | Updaye pmux2shiftx test | Clifford Wolf | 2019-04-22 | 1 | -2/+2 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | Merge pull request #909 from zachjs/master | Clifford Wolf | 2019-04-22 | 2 | -0/+48 | |
| | |\ | | | | | | | support repeat loops with constant repeat counts outside of constant functions | |||||
| | | * | support repeat loops with constant repeat counts outside of constant functions | Zachary Snow | 2019-04-09 | 2 | -0/+48 | |
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| | * | | Merge pull request #944 from YosysHQ/clifford/pmux2shiftx | Clifford Wolf | 2019-04-22 | 2 | -0/+62 | |
| | |\ \ | | | | | | | | | Add pmux2shiftx command | |||||
| | | * | | Improve "pmux2shiftx" | Clifford Wolf | 2019-04-20 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | | Improvements in "pmux2shiftx" | Clifford Wolf | 2019-04-20 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | | Improvements in pmux2shiftx | Clifford Wolf | 2019-04-20 | 2 | -20/+30 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | | Add test for pmux2shiftx | Clifford Wolf | 2019-04-20 | 2 | -0/+52 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | Merge remote-tracking branch 'origin/clifford/libwb' into xaig | Eddie Hung | 2019-04-21 | 2 | -2/+3 | |
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| | * | | | Fix tests | Clifford Wolf | 2019-04-21 | 2 | -2/+3 | |
| | |/ / | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-20 | 2 | -0/+8 | |
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| | * | | Add tests/aiger/.gitignore | Clifford Wolf | 2019-04-19 | 1 | -0/+2 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | Add retime test | Eddie Hung | 2019-04-05 | 1 | -0/+6 | |
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| * | | Select to find union of both sets on stack | Eddie Hung | 2019-04-19 | 1 | -1/+1 | |
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| * | | Re-enable partsel.v test | Eddie Hung | 2019-04-16 | 1 | -1/+0 | |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-15 | 1 | -3/+2 | |
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| | * | | Revert "Recognise default entry in case even if all cases covered (fix for ↵ | Eddie Hung | 2019-04-15 | 1 | -3/+2 | |
| | | | | | | | | | | | | | #931)" | |||||
| * | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-12 | 1 | -2/+3 | |
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| | * | | Add default entry to testcase | Eddie Hung | 2019-04-11 | 1 | -2/+3 | |
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| * | | Merge branch 'master' into xaig | Eddie Hung | 2019-04-08 | 14 | -5/+737 | |
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| | * | Liberty file parser now accepts superfluous ; | Niels Moseley | 2019-03-27 | 1 | -1/+1 | |
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| | * | Liberty file parser now accepts superfluous ; | Niels Moseley | 2019-03-27 | 3 | -2/+97 | |
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| | * | Fix "verific -extnets" for more complex situations | Clifford Wolf | 2019-03-26 | 1 | -0/+22 | |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | Updated the liberty parser to accept [A:B] ranges (AST has not been ↵ | Niels Moseley | 2019-03-24 | 6 | -0/+541 | |
| | | | | | | | | | updated). Liberty parser now also accepts key : value pair lines that do not end in ';'. | |||||
| | * | Merge https://github.com/YosysHQ/yosys into read_aiger | Eddie Hung | 2019-03-19 | 11 | -31/+175 | |
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| | | * | fix local name resolution in prefix constructs | Zachary Snow | 2019-03-18 | 1 | -0/+56 | |
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| | | * | Fix handling of task output ports in clocked always blocks, fixes #857 | Clifford Wolf | 2019-03-07 | 1 | -0/+19 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v fails | Jim Lawson | 2019-03-04 | 1 | -0/+1 | |
| | | | | | | | | | | | | | Mark dff_init.v as expected to fail since it uses "initial value". | |||||
| | | * | Hotfix for "make test" | Clifford Wolf | 2019-02-28 | 1 | -1/+1 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | Add "write_verilog -siminit" | Clifford Wolf | 2019-02-28 | 1 | -1/+1 | |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | Fix FIRRTL to Verilog process instance subfield assignment. | Jim Lawson | 2019-02-25 | 3 | -3/+1 | |
| | | | | | | | | | | | | | | | | | | | Don't emit subfield assignments: bits(x, y, z) <= ... - but instead, add them to the reverse-wire-map where they'll be treated at the end of the module. Enable tests which were disabled due to incorrect treatment of subfields. Assume the `$firrtl2verilog` variable contains any additional switches to control verilog generation (i.e. `--no-dedup -X mverilog`) | |||||
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index : iCE40/yosys | |
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