From 96db05aaefd970c819ba1f75b7246c5958527b8b Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 31 Dec 2019 17:06:03 -0800
Subject: parse_xaiger to not take box_lookup

---
 frontends/aiger/aigerparse.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'frontends/aiger/aigerparse.h')

diff --git a/frontends/aiger/aigerparse.h b/frontends/aiger/aigerparse.h
index 583c9d0f9..de3c3efbc 100644
--- a/frontends/aiger/aigerparse.h
+++ b/frontends/aiger/aigerparse.h
@@ -47,7 +47,7 @@ struct AigerReader
 
     AigerReader(RTLIL::Design *design, std::istream &f, RTLIL::IdString module_name, RTLIL::IdString clk_name, std::string map_filename, bool wideports);
     void parse_aiger();
-    void parse_xaiger(const dict<int,IdString> &box_lookup);
+    void parse_xaiger();
     void parse_aiger_ascii();
     void parse_aiger_binary();
     void post_process();
-- 
cgit v1.2.3


From ee95fa959acc3a796836c9df970d6739d6cf0ade Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 13 Jan 2020 21:28:27 -0800
Subject: read_aiger: uniquify wires with $aiger<autoidx> prefix

---
 frontends/aiger/aigerparse.h | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'frontends/aiger/aigerparse.h')

diff --git a/frontends/aiger/aigerparse.h b/frontends/aiger/aigerparse.h
index de3c3efbc..722f1e472 100644
--- a/frontends/aiger/aigerparse.h
+++ b/frontends/aiger/aigerparse.h
@@ -33,6 +33,7 @@ struct AigerReader
     RTLIL::Module *module;
     std::string map_filename;
     bool wideports;
+    const int aiger_autoidx;
 
     unsigned M, I, L, O, A;
     unsigned B, C, J, F; // Optional in AIGER 1.9
@@ -51,6 +52,8 @@ struct AigerReader
     void parse_aiger_ascii();
     void parse_aiger_binary();
     void post_process();
+
+    RTLIL::Wire* createWireIfNotExists(RTLIL::Module *module, unsigned literal);
 };
 
 YOSYS_NAMESPACE_END
-- 
cgit v1.2.3


From 73526a6f103c927dd0d1504281659a87e7943688 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Wed, 22 Jan 2020 14:21:25 -0800
Subject: read_aiger: also parse abc9_mergeability

---
 frontends/aiger/aigerparse.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'frontends/aiger/aigerparse.h')

diff --git a/frontends/aiger/aigerparse.h b/frontends/aiger/aigerparse.h
index 722f1e472..46ac81212 100644
--- a/frontends/aiger/aigerparse.h
+++ b/frontends/aiger/aigerparse.h
@@ -45,6 +45,7 @@ struct AigerReader
     std::vector<RTLIL::Wire*> outputs;
     std::vector<RTLIL::Wire*> bad_properties;
     std::vector<RTLIL::Cell*> boxes;
+    std::vector<int> mergeability;
 
     AigerReader(RTLIL::Design *design, std::istream &f, RTLIL::IdString module_name, RTLIL::IdString clk_name, std::string map_filename, bool wideports);
     void parse_aiger();
-- 
cgit v1.2.3