From 8da0888bf6ae4c975c6d3b0c9a656bc10e1283e4 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 20 Sep 2019 12:16:20 +0200
Subject: Fix handling of read_verilog config in AstModule::reprocess_module(),
 fixes #1360

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---
 frontends/ast/ast.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'frontends/ast/ast.h')

diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h
index 54b2fb319..93fee913e 100644
--- a/frontends/ast/ast.h
+++ b/frontends/ast/ast.h
@@ -299,6 +299,7 @@ namespace AST
 		std::string derive_common(RTLIL::Design *design, dict<RTLIL::IdString, RTLIL::Const> parameters, AstNode **new_ast_out, bool mayfail);
 		void reprocess_module(RTLIL::Design *design, dict<RTLIL::IdString, RTLIL::Module *> local_interfaces) YS_OVERRIDE;
 		RTLIL::Module *clone() const YS_OVERRIDE;
+		void loadconfig() const;
 	};
 
 	// this must be set by the language frontend before parsing the sources
-- 
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