From 4a4a3fc3377243d85100b829a0f6b785376cce9f Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 4 Dec 2013 21:06:54 +0100 Subject: Various improvements in support for generate statements --- frontends/ast/genrtlil.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'frontends/ast/genrtlil.cc') diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 7ebc4b719..269752df5 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -812,6 +812,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) case AST_GENFOR: case AST_GENBLOCK: case AST_GENIF: + case AST_GENCASE: break; // remember the parameter, needed for example in techmap -- cgit v1.2.3