From 14f32028ec878b8ba7324584631523f5b571b39f Mon Sep 17 00:00:00 2001 From: Peter Date: Thu, 27 Feb 2020 16:57:35 +0000 Subject: Parser changes to support typedef. --- frontends/verilog/verilog_frontend.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'frontends/verilog/verilog_frontend.h') diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h index a2e06f0e4..73ea51e6c 100644 --- a/frontends/verilog/verilog_frontend.h +++ b/frontends/verilog/verilog_frontend.h @@ -45,6 +45,12 @@ namespace VERILOG_FRONTEND // this function converts a Verilog constant to an AST_CONSTANT node AST::AstNode *const2ast(std::string code, char case_type = 0, bool warn_z = false); + // names of locally typedef'ed types + extern std::map user_types; + + // names of package typedef'ed types + extern std::map pkg_user_types; + // state of `default_nettype extern bool default_nettype_wire; -- cgit v1.2.3 From ecc22f7fedfa639482dbc55a05709da85116a60f Mon Sep 17 00:00:00 2001 From: Peter Crozier Date: Mon, 23 Mar 2020 20:07:22 +0000 Subject: Support module/package/interface/block scope for typedef names. --- frontends/verilog/verilog_frontend.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'frontends/verilog/verilog_frontend.h') diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h index 73ea51e6c..caa6246ef 100644 --- a/frontends/verilog/verilog_frontend.h +++ b/frontends/verilog/verilog_frontend.h @@ -45,8 +45,9 @@ namespace VERILOG_FRONTEND // this function converts a Verilog constant to an AST_CONSTANT node AST::AstNode *const2ast(std::string code, char case_type = 0, bool warn_z = false); - // names of locally typedef'ed types - extern std::map user_types; + // names of locally typedef'ed types in a stack + typedef std::map UserTypeMap; + extern std::vector user_type_stack; // names of package typedef'ed types extern std::map pkg_user_types; -- cgit v1.2.3 From 044ca9dde409e3c91542fe95513d6641110f8462 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Tue, 17 Mar 2020 09:34:31 +0000 Subject: Add support for SystemVerilog-style `define to Verilog frontend This patch should support things like `define foo(a, b = 3, c) a+b+c `foo(1, ,2) which will evaluate to 1+3+2. It also spots mistakes like `foo(1) (the 3rd argument doesn't have a default value, so a call site is required to set it). Most of the patch is a simple parser for the format in preproc.cc, but I've also taken the opportunity to wrap up the "name -> definition" map in a type, rather than use multiple std::map's. Since this type needs to be visible to code that touches defines, I've pulled it (and the frontend_verilog_preproc declaration) out into a new file at frontends/verilog/preproc.h and included that where necessary. Finally, the patch adds a few tests in tests/various to check that we are parsing everything correctly. --- frontends/verilog/verilog_frontend.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'frontends/verilog/verilog_frontend.h') diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h index 73ea51e6c..636a4ceca 100644 --- a/frontends/verilog/verilog_frontend.h +++ b/frontends/verilog/verilog_frontend.h @@ -85,10 +85,6 @@ namespace VERILOG_FRONTEND extern std::istream *lexin; } -// the pre-processor -std::string frontend_verilog_preproc(std::istream &f, std::string filename, const std::map &pre_defines_map, - dict> &global_defines_cache, const std::list &include_dirs); - YOSYS_NAMESPACE_END // the usual bison/flex stuff -- cgit v1.2.3