From 75009ada3c2a4bcd38c52c8fb871c9e8c1f2e6b1 Mon Sep 17 00:00:00 2001
From: Ruben Undheim <ruben.undheim@gmail.com>
Date: Thu, 11 Oct 2018 23:33:31 +0200
Subject: Synthesis support for SystemVerilog interfaces

This time doing the changes mostly in AST before RTLIL generation
---
 kernel/rtlil.cc | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

(limited to 'kernel/rtlil.cc')

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index a4fa2cf04..fadac0872 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -639,6 +639,13 @@ RTLIL::Module::~Module()
 		delete it->second;
 }
 
+void RTLIL::Module::reprocess_module(RTLIL::Design *design, dict<RTLIL::IdString, RTLIL::Module *> local_interfaces)
+{
+	log_error("Cannot reprocess_module module `%s' !\n", id2cstr(name));
+	(void)local_interfaces; // To remove build warning
+	(void)design;           // To remove build warning
+}
+
 RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict<RTLIL::IdString, RTLIL::Const>, bool mayfail)
 {
 	if (mayfail)
@@ -646,6 +653,14 @@ RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict<RTLIL::IdString, RTLI
 	log_error("Module `%s' is used with parameters but is not parametric!\n", id2cstr(name));
 }
 
+
+RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict<RTLIL::IdString, RTLIL::Const>, dict<RTLIL::IdString, RTLIL::Module*> , bool mayfail)
+{
+	if (mayfail)
+		return RTLIL::IdString();
+	log_error("Module `%s' is used with parameters but is not parametric!\n", id2cstr(name));
+}
+
 size_t RTLIL::Module::count_id(RTLIL::IdString id)
 {
 	return wires_.count(id) + memories.count(id) + cells_.count(id) + processes.count(id);
-- 
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