From cb7dbf4070a7ca3658b7e473cb54f2eafb6c9ae3 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 7 Sep 2016 12:42:16 +0200 Subject: Improvements in assertpmux --- kernel/rtlil.cc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'kernel/rtlil.cc') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 41b4b93f0..32efe4f0d 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -1975,6 +1975,22 @@ RTLIL::Cell* RTLIL::Module::addDlatchsrGate(RTLIL::IdString name, RTLIL::SigSpec return cell; } +RTLIL::SigSpec RTLIL::Module::Anyconst(RTLIL::IdString name, int width) +{ + RTLIL::SigSpec sig = addWire(NEW_ID, width); + Cell *cell = addCell(name, "$anyconst"); + cell->setParam("\\WIDTH", width); + cell->setPort("\\Y", sig); + return sig; +} + +RTLIL::SigSpec RTLIL::Module::Initstate(RTLIL::IdString name) +{ + RTLIL::SigSpec sig = addWire(NEW_ID); + Cell *cell = addCell(name, "$initstate"); + cell->setPort("\\Y", sig); + return sig; +} RTLIL::Wire::Wire() { -- cgit v1.2.3