From 54b0f2e659ac0c34c69b0c251c72b2a90fe8e6b6 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Mon, 21 Jul 2014 12:02:55 +0200 Subject: Added module->remove(), module->addWire(), module->addCell(), cell->check() --- kernel/rtlil.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'kernel/rtlil.h') diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 64136de04..19666481d 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -290,12 +290,16 @@ struct RTLIL::Module { RTLIL::Wire *new_wire(int width, RTLIL::IdString name); void add(RTLIL::Wire *wire); void add(RTLIL::Cell *cell); + void remove(RTLIL::Cell *cell); void fixup_ports(); template void rewrite_sigspecs(T functor); void cloneInto(RTLIL::Module *new_mod) const; virtual RTLIL::Module *clone() const; + RTLIL::Wire *addWire(RTLIL::IdString name, int width = 1); + RTLIL::Cell *addCell(RTLIL::IdString name, RTLIL::IdString type); + // The add* methods create a cell and return the created cell. All signals must exist in advance. RTLIL::Cell* addNot (RTLIL::IdString name, RTLIL::SigSpec sig_a, RTLIL::SigSpec sig_y, bool is_signed = false); @@ -449,6 +453,7 @@ struct RTLIL::Cell { std::map parameters; RTLIL_ATTRIBUTE_MEMBERS void optimize(); + void check(); template void rewrite_sigspecs(T functor); }; -- cgit v1.2.3