From 0bc95f1e049afc35bb5ea30663b0a5725dfbf584 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 21 Apr 2016 23:28:37 +0200 Subject: Added "yosys -D" feature --- passes/hierarchy/submod.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'passes/hierarchy/submod.cc') diff --git a/passes/hierarchy/submod.cc b/passes/hierarchy/submod.cc index d4e8c96ca..9f312f82d 100644 --- a/passes/hierarchy/submod.cc +++ b/passes/hierarchy/submod.cc @@ -298,7 +298,7 @@ struct SubmodPass : public Pass { } virtual void execute(std::vector args, RTLIL::Design *design) { - log_header("Executing SUBMOD pass (moving cells to submodules as requested).\n"); + log_header(design, "Executing SUBMOD pass (moving cells to submodules as requested).\n"); log_push(); std::string opt_name; @@ -321,7 +321,7 @@ struct SubmodPass : public Pass { if (opt_name.empty()) { Pass::call(design, "opt_clean"); - log_header("Continuing SUBMOD pass.\n"); + log_header(design, "Continuing SUBMOD pass.\n"); std::set handled_modules; @@ -356,7 +356,7 @@ struct SubmodPass : public Pass { log("Nothing selected -> do nothing.\n"); else { Pass::call_on_module(design, module, "opt_clean"); - log_header("Continuing SUBMOD pass.\n"); + log_header(design, "Continuing SUBMOD pass.\n"); SubmodWorker worker(design, module, copy_mode, opt_name); } } -- cgit v1.2.3