From 046e1a52147dd4a0e1f23e4aa7cb71b0a4d1b497 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 6 Aug 2019 16:22:47 -0700 Subject: Use State::S{0,1} --- passes/sat/miter.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'passes/sat/miter.cc') diff --git a/passes/sat/miter.cc b/passes/sat/miter.cc index 1a886af70..e1da1a9e6 100644 --- a/passes/sat/miter.cc +++ b/passes/sat/miter.cc @@ -236,7 +236,7 @@ void create_miter_equiv(struct Pass *that, std::vector args, RTLIL: if (flag_make_assert) { RTLIL::Cell *assert_cell = miter_module->addCell(NEW_ID, "$assert"); assert_cell->setPort("\\A", all_conditions); - assert_cell->setPort("\\EN", RTLIL::SigSpec(1, 1)); + assert_cell->setPort("\\EN", State::S1); } RTLIL::Wire *w_trigger = miter_module->addWire("\\trigger"); -- cgit v1.2.3 From 6d77236f3845cd8785e7bdd4da3c5ef966be6043 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 7 Aug 2019 12:20:08 -0700 Subject: substr() -> compare() --- passes/sat/miter.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'passes/sat/miter.cc') diff --git a/passes/sat/miter.cc b/passes/sat/miter.cc index e1da1a9e6..49ef40061 100644 --- a/passes/sat/miter.cc +++ b/passes/sat/miter.cc @@ -59,7 +59,7 @@ void create_miter_equiv(struct Pass *that, std::vector args, RTLIL: } break; } - if (argidx+3 != args.size() || args[argidx].substr(0, 1) == "-") + if (argidx+3 != args.size() || args[argidx].compare(0, 1, "-") == 0) that->cmd_error(args, argidx, "command argument error"); RTLIL::IdString gold_name = RTLIL::escape_id(args[argidx++]); @@ -279,7 +279,7 @@ void create_miter_assert(struct Pass *that, std::vector args, RTLIL } break; } - if ((argidx+1 != args.size() && argidx+2 != args.size()) || args[argidx].substr(0, 1) == "-") + if ((argidx+1 != args.size() && argidx+2 != args.size()) || args[argidx].compare(0, 1, "-") == 0) that->cmd_error(args, argidx, "command argument error"); IdString module_name = RTLIL::escape_id(args[argidx++]); -- cgit v1.2.3