From cef607c8b77803aa1236d250da4ca6841f78a4ea Mon Sep 17 00:00:00 2001 From: Claire Wolf Date: Mon, 27 Jan 2020 18:27:47 +0100 Subject: Add log_experimental() and experimental() API and "yosys -x" Signed-off-by: Claire Wolf --- techlibs/intel/synth_intel.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'techlibs/intel/synth_intel.cc') diff --git a/techlibs/intel/synth_intel.cc b/techlibs/intel/synth_intel.cc index 2ebb8bf50..3689df70e 100644 --- a/techlibs/intel/synth_intel.cc +++ b/techlibs/intel/synth_intel.cc @@ -26,7 +26,7 @@ USING_YOSYS_NAMESPACE PRIVATE_NAMESPACE_BEGIN struct SynthIntelPass : public ScriptPass { - SynthIntelPass() : ScriptPass("synth_intel", "synthesis for Intel (Altera) FPGAs.") {} + SynthIntelPass() : ScriptPass("synth_intel", "synthesis for Intel (Altera) FPGAs.") { experimental(); } void help() YS_OVERRIDE { -- cgit v1.2.3