From 40b3551b45ea4a9901f68f1ecd0983270973a1f1 Mon Sep 17 00:00:00 2001
From: James Walmsley <james@fullfat-fs.co.uk>
Date: Sun, 27 Oct 2013 21:48:39 +0100
Subject: [EXAMPLES] Ported the mojo counter example to Zynq ZED board.

Will be adding a tutorial on this to verilog.james.walms.co.uk in a few days.
---
 techlibs/xilinx/example_zed_counter/example.sh | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 techlibs/xilinx/example_zed_counter/example.sh

(limited to 'techlibs/xilinx/example_zed_counter/example.sh')

diff --git a/techlibs/xilinx/example_zed_counter/example.sh b/techlibs/xilinx/example_zed_counter/example.sh
new file mode 100644
index 000000000..d0fcd8322
--- /dev/null
+++ b/techlibs/xilinx/example_zed_counter/example.sh
@@ -0,0 +1,18 @@
+#!/bin/bash
+
+set -ex
+
+XILINX_DIR=/opt/Xilinx/14.7/ISE_DS/ISE
+XILINX_PART=xc7z020clg484-1
+
+yosys - <<- EOT
+	read_verilog example.v
+	synth_xilinx -edif synth.edif
+EOT
+
+$XILINX_DIR/bin/lin64/edif2ngd -a synth.edif synth.ngo
+$XILINX_DIR/bin/lin64/ngdbuild -p $XILINX_PART -uc example.ucf synth.ngo synth.ngd
+$XILINX_DIR/bin/lin64/map -p $XILINX_PART -w -o mapped.ncd synth.ngd constraints.pcf
+$XILINX_DIR/bin/lin64/par -w mapped.ncd placed.ncd constraints.pcf
+$XILINX_DIR/bin/lin64/bitgen -w placed.ncd example.bit constraints.pcf
+$XILINX_DIR/bin/lin64/promgen -w -b -p bin -o example.bin -u 0 example.bit -data_width 32
-- 
cgit v1.2.3