From 40b3551b45ea4a9901f68f1ecd0983270973a1f1 Mon Sep 17 00:00:00 2001 From: James Walmsley Date: Sun, 27 Oct 2013 21:48:39 +0100 Subject: [EXAMPLES] Ported the mojo counter example to Zynq ZED board. Will be adding a tutorial on this to verilog.james.walms.co.uk in a few days. --- techlibs/xilinx/example_zed_counter/example.ucf | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 techlibs/xilinx/example_zed_counter/example.ucf (limited to 'techlibs/xilinx/example_zed_counter/example.ucf') diff --git a/techlibs/xilinx/example_zed_counter/example.ucf b/techlibs/xilinx/example_zed_counter/example.ucf new file mode 100644 index 000000000..dadc8373c --- /dev/null +++ b/techlibs/xilinx/example_zed_counter/example.ucf @@ -0,0 +1,14 @@ +NET "clk" TNM_NET = clk; +TIMESPEC TS_clk = PERIOD "clk" 50 MHz HIGH 50%; + +NET "clk" LOC = Y9 | IOSTANDARD=LVCMOS33; # "GCLK" +NET "ctrl" LOC = P16 | IOSTANDARD=LVCMOS18; # "BTNC" + +NET "led_0" LOC = T22 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_1" LOC = T21 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_2" LOC = U22 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_3" LOC = U21 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_4" LOC = V22 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_5" LOC = W22 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_6" LOC = U19 | IOSTANDARD=LVCMOS33; # "LD0" +NET "led_7" LOC = U14 | IOSTANDARD=LVCMOS33; # "LD0" -- cgit v1.2.3