From 266993408a2b926ffefcf536feb92b36b11e398e Mon Sep 17 00:00:00 2001 From: Diego H Date: Fri, 13 Dec 2019 15:43:24 -0600 Subject: Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific --- techlibs/xilinx/xc7_xcu_brams.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'techlibs') diff --git a/techlibs/xilinx/xc7_xcu_brams.txt b/techlibs/xilinx/xc7_xcu_brams.txt index b7c893ff7..a52dd9352 100644 --- a/techlibs/xilinx/xc7_xcu_brams.txt +++ b/techlibs/xilinx/xc7_xcu_brams.txt @@ -81,6 +81,7 @@ match $__XILINX_RAMB36_SDP min efficiency 5 shuffle_enable B make_transp + attribute !ram_style !logic_block or_next_if_better endmatch @@ -89,6 +90,14 @@ match $__XILINX_RAMB18_SDP min efficiency 5 shuffle_enable B make_transp + attribute !ram_style !logic_block + or_next_if_better +endmatch + +match $__XILINX_RAMB18_SDP + shuffle_enable B + make_transp + attribute ram_block=1 ram_style=block or_next_if_better endmatch @@ -97,6 +106,7 @@ match $__XILINX_RAMB36_TDP min efficiency 5 shuffle_enable B make_transp + attribute !ram_style !logic_block or_next_if_better endmatch @@ -105,4 +115,13 @@ match $__XILINX_RAMB18_TDP min efficiency 5 shuffle_enable B make_transp + attribute !ram_style !logic_block + or_next_if_better +endmatch + +match $__XILINX_RAMB18_TDP + min efficiency 5 + shuffle_enable B + make_transp + attribute ram_block=1 ram_style=block endmatch -- cgit v1.2.3