From d738b2c1272b02d8799e9feda83b1eae8ba10c07 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Tue, 2 Mar 2021 10:43:53 -0500 Subject: sv: support for parameters without default values - Modules with a parameter without a default value will be automatically deferred until the hierarchy pass - Allows for parameters without defaults as module items, rather than just int the `parameter_port_list`, despite being forbidden in the LRM - Check for parameters without defaults that haven't been overriden - Add location info to parameter/localparam declarations --- tests/verilog/param_no_default.ys | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 tests/verilog/param_no_default.ys (limited to 'tests/verilog/param_no_default.ys') diff --git a/tests/verilog/param_no_default.ys b/tests/verilog/param_no_default.ys new file mode 100644 index 000000000..7f161a909 --- /dev/null +++ b/tests/verilog/param_no_default.ys @@ -0,0 +1,7 @@ +read_verilog -sv param_no_default.sv +hierarchy +proc +flatten +opt -full +select -module top +sat -verify -seq 1 -tempinduct -prove-asserts -show-all -- cgit v1.2.3